These are partially preparation for having the ARM11 code use the same new watchpoint infrastructure as the Cortex-A8, but mostly just a lot of streamlining ... as shown by diffstat:
src/target/arm11.c | 350 +++++++++------------------------------------- src/target/arm11.h | 30 --- src/target/arm11_dbgtap.c | 45 +++-- src/target/arm11_dbgtap.h | 5 src/target/arm_dpm.c | 25 +-- src/target/arm_dpm.h | 2 src/target/cortex_a8.c | 7 These seem ready to merge, so expect to see them merged soon into mainline. What they do: - DPM initialization tweaks ... since ARM11 accesses the watchpoint registers a bit differently than Cortex-A8, shuffle things around a bit. - Remove arm11->target ... we have arm->target, use that. Also remove incomplete breakpoint hookery. - Streamline debug entry ... there's a bunch of stuff all callers do which should be part of the debug entry proc. - Don't expose the RDTR register through Tcl; needless and bugprone. - Ditto WDTR. - Keep a copy of DSCR in arm11->dscr, and simplify almost all code neeeding such a value. - Don't expose DSCR through Tcl; needless/bugprone/etc. Lets us get rid of that register cache, so a stock ARM11 target will look like most any other ARMv4-style core. Yes, I like removing code that's not necessary. It's one way of helping make bugs become homeless. :) _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
