On Sunday 13 December 2009, Øyvind Harboe wrote:
> > Recent ARMs don't share the "just two breakpoint/watchpoint units"
> > restriction of ARM7/ARM9 EmbeddedICE.
> >
> > Example, Cortex A8 and ARM11 have 6 breakpoints, 2 watchpoints.
> > Cortex M3 has 6 breakpoints (flash only), 4 watchpoints.
>
> I was meaning to have a serious look at this work. Did see my
> idea on masks for breakpoint/watchpoints?
>
> http://lists.berlios.de/pipermail/openocd-development/2009-October/011507.html
Just now. I'm not clear what a "mask" would be though ...
as in, what's different from the current notion of masks?
That's fairly specific to the ARM7/ARM9 EmbeddedICE; it's
only used in conjunction with a value, for "trigger debug
entry when writing <value X> to the address".
> help wp
wp [<address> <length> <r/w/a> [value] [mask]]
list or set watchpoint Valid Modes: EXEC
>
(Note that syntax is incorrect ... to include a mask,
there must also be a value. All those helptexts need
to be reviewed and corrected.)
The Cortex-M3 watchpoint code right now should handle
lengths up to whatever the hardware allows (32 KB ISTR),
so long as the data structure is naturally aligned ...
though I'm told there are CM3 libraries that rely on
the unaligned access support.
The ARM11 can't handle lengths of more than 4 bytes,
but Cortex-A8 can handle up to 2 GByte watchpoints.
- Dave
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