On Sun, Jan 10, 2010 at 10:35 PM, David Brownell <[email protected]> wrote: > It's not in 0.4 but I've been looking at some of the infrastructure > work that's needed to incorporate it. Various non-mergeable patches > have been sent around. > > I'll post some more later, but for now I see several areas that can > work somewhat in parallel until they combine: > (...)
Well, here goes the science-fiction part :-) Some time ago there was a concept to join two big open-source projects named OpenOCD and UrJTAG to become one giant. OpenOCD could then serve a high level logic and UrJTAG provide low level access to the hardware devices and interface dongles. Do you guys think this could be accomplished, or those two projects gone far different way? Maybe this SWD could be a good starting point if there is a lot to be done on a OpenOCD side, while UrJTAG has these interfaces organised already... Or maybe it is not the time yet and some further development should be done (ie UrJTAG as a library) before merge? Even so - maybe this is a good time to prepare some API in OpenOCD for JTAG access - to support different access modes (current jtag and future swd) or even methods (supplied by externel UrJTAG-based library)..? I dont know OpenOCD internals but maybe they are somewhat similar to these in UrJTAG [1]..? >> I have bought some voltage regulators (L6928D) for STM32Primer2 so now >> (...) > > Yeah, I've heard those Primer2 things are kind of neat but have some > problems (not all those regulator issues are build errors). Well at first I thought the whole primer2 was dead after I tried to acces it with OpenOCD JTAG method, but playing with a scope and a flashlight showed it was only a voltage regulator (u17 powering the dac and the lcd backlight), so this trick can be repeated I think ]:-> These primers2 [2] are pretty cool for developing software and early stage prototyping as there are already neat peripherials onboard - color lcd with touchscreen, adc, dac, microsd slot, oboard rlink, nice plastic casing and expansion slot - unfortunately except some unresolved hardware design flaws, there were some software design flaws but most of them are now recognized and solved :-) Still one of the voltage regulators seems to be vulnerable for ESD / overvoltage from usb line - in right moment I will play with some protecting diodes/transil and different capacitors as suggested by designers to verify if this helps :-) > I wouldn't be surprised to see some SWD stuff be testable around then. > What would surprise me is having it do more than limp through some > basic enumeration. I suspect you could help with RLink support for > those boards. Sure thing! I have even one interesting toy to play with rlink :-P Best rehards! :-) Tomek [1] http://urjtag.svn.sourceforge.net/viewvc/urjtag/tags/URJTAG_0_10/web/htdocs/book/_jtag_commands.html [2] http://www.stm32circle.com/ -- CeDeROM, http://www.tomek.cedro.info _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
