On Friday 29 January 2010, Laurent Gauch wrote:
> The physical ETM trace port of a new ARM ( Cortex)  is including one 
> clock line + 4 Data Line

I thought that was a fairly standard option lately ... some trace ports
support more bandwidth (e.g. 64 bits), most can throttle down to 4 bits
(or sometimes less).


> Anyone knows if the ETM Trace packet is ever based 32bits (8 nibbles) or 
> could be 16bits (4 nibbles) ?

The ETM architecture spec says trace packets (using ETMv3 signal protocol)
have a header byte plus zero or more payload bytes.  So your question seems
to add up to "can there be three payload bytes".  There's a table showing
some packets having up to 19 payload bytes...

I think one trivial example of three payload bytes would be a cycle count.
Max of five bytes payload, but since the count is differential then it can
have fewer bytes.  (If the MSBs are zero they're omitted, for more compact
encoding.)


IMO, the ETM support in OpenOCD isn't really usable just now.
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