Nicolas Pitre wrote: > From: Spencer Oliver <[email protected]> > >> @@ -480,6 +460,39 @@ int arm_semihosting(struct target *target, int >> *retval) >> return 0; >> } >> >> - *retval = do_semihosting(target); >> + lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(arm->core_cache, ARM_MODE_SVC, >> 14).value, 0, 32); >> + spsr = buf_get_u32(arm->spsr->value, 0, 32); >> + >> + *retval = do_semihosting(target, >> + buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32), >> + buf_get_u32(arm->core_cache->reg_list[1].value, 0, 32), >> + &arm->semi_hosting_info, >> + &result); >> + >> + if (*retval != ERROR_OK) >> + return 1; >> + >> + /* resume execution to the original mode */ >> + >> + /* return value in R0 */ >> + buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result); >> + arm->core_cache->reg_list[0].dirty = 1; >> + >> + /* LR --> PC */ >> + buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32, lr); >> + arm->core_cache->reg_list[15].dirty = 1; >> + >> + /* saved PSR --> current PSR */ >> + buf_set_u32(arm->cpsr->value, 0, 32, spsr); >> + arm->cpsr->dirty = 1; >> + arm->core_mode = spsr & 0x1f; >> + if (spsr & 0x20) >> + arm->core_state = ARM_STATE_THUMB; >> + >> + *retval = target_resume(target, 1, 0, 0, 0); >> + >> + return 1; >> +} >> + >> return 1; >> } > > This patch must not compile? There is a stray "return 1;" and a closing > bracket there. > > Otherwise this patch and the other two look fine. >
not sure what happened there, its been fixed now however. Cheers Spen _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
