On Wednesday 03 February 2010 14:55:20 Nick wrote: > here is my output: > Info : ARM-JTAG-EW firmware version 1.4, hardware revision A, > SN=OL24B4C000F43EE, Additional info: Date of firmware comp ilation: Sep 10 > 2009, 15:55:50, Source revision: 823 > Info : U_tg = 3235 mV, U_aux = 0 mV, U_tgpwr = 5059 mV, I_tgpwr = 0 mA, D1 > = 1, Target power OK enabled > > Info : ARM-JTAG-EW JTAG Interface ready > Error: Translation from jtag_speed to khz not implemented > Info : interface specific clock speed value 500 > Info : JTAG tap: lpc2378.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, > part: 0xf1f0, ver: 0x4) Info : Embedded ICE version 7 > Error: EmbeddedICE v7 handling might be broken > Info : lpc2378.cpu: hardware has 2 breakpoints or watchpoints > You are using 500kHz Jtag clock, so RTCK is not active. CPU ID is read correctly, target power seems OK, so JTAG seems to be working. Could you post your log when CPU handling breaks? Please use "-d3" option for verbosity. Also make sure 500kHz is low enough for your LPC target chip - I suspect it must be lowered.
If it appears to be a USB communication problem, please configure openocd with verbose comm options enabled: openocd$ ./configure .... --enable-verbose-usb-io --enable-verbose-usb-comms If log file becomes too big for a mailing list you can send me a private mail. I'll look into the jtag_speed error. At first sight it appears to be harmless. > thanks, > Nick > Thanks, Dimitar _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
