On Monday 15 February 2010, CeDeROM wrote:
> > But also ... don't all those "STM32Primer" boards require
> > SWD support? OpenOCD doesn't yet support that.
>
> Partially - the Primer1 use RLink in JTAG mode, Primer2 use RLink in
> SWD mode. I am planning to work on SWD support soon (probably
> start/mid march) - I have even downloaded some documentation few days
> ago :-)
Documentation is a start -- the ADIv5 spec (ARM IHI 0031A) primarily.
I'll send some preliminary SWD info along in a bit. I see
the merge needing several chunks. Partially ordered:
Provide a clean way to make ADIv5 use SWD -or- JTAG
- arm_adi_v5.c cleanup ... it's pretty messy, especially
fault handling
- arm_adi_v5.c "transport layer" under which either
JTAG or SWD transports can be placed
- Use that transport layer (several chunks) so that all
clients will be transport-neutral
Support JTAG-or-SWD adapters
- SWD adapter infrastructure ... sending bit sequences out
on the JTAG TMS line (one chunk), performing individual
32-bit SWD transfers, the notion of "adapter mode"
which can be either JTAG or SWD (maybe more later)
- Implement that adapter infrastructure for some FT2232
based hardware.
Make all the above work together
- Implement and kick in SWD transport infrastructure. This
needs to include SWD link initialization (includes reading
IDCODE register) which is a different model than JTAG ...
and it'll need to start behaving on some Cortex-M3 cores.
You can see my cleanup patches (mostly) and the tms sequence stuff
in my "swd" branch at
http://repo.or.cz/w/openocd/dave.git
Once it's working, I'll send out the ADIv5 "transport layer" patches
for comment ... since I figure they should merge as soon as they're
known to behave for the JTAG option (should be straightforward other
than volume of changes).
Then the other stuff will be more focussed specifically on SWD low
level stuff. I figure that'll be the easiest place for other folk
to help out with code ... new driver support, in particular, but also
testing and all that.
- Dave
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