After some discussion & testing we decided to push the arm920t fix to the breakpoints. The fix should be complete and robust.
The approach is interesting because it is fairly generic: read cache line, write it to physical memory manually, then invalidate cache line. The fix was located to an already broken implementation. It would be nicer if we could simply execute the mcr instructions using a general arm9 mechanism, but such cleanup we can do later... Can I have a confirmation that the master branch now works w/arm920t breakpoints? - in cached read/write memory - in cached read only memory(marked as read only by MMU). -- Øyvind Harboe Visit us at Embedded World, March 2nd-4th. IS2T's stand, HALL 10 - 118 http://www.zylin.com/events_embeddedworld.html US toll free 1-866-980-3434 / International +47 51 63 25 00 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
