Jon Povey wrote: > Since then I have also tested the latest GIT version under (virtual) > linux, and also the latest git version build with FTDI's drivers > instead of libftdi. All combinations show the same random errors. > Also tried at a range of different JTAG clock speeds, makes no > difference. > > I am looking through documentation for other tuneables I can try > fiddling with, and I have a logic analyer/scope arriving next week > which might be of use.
If anyone was curious, this seems (touch wood) to be OK now after building a new 14-20pin JTAG adapter ribbon with GND lines properly earthed at both ends, and reducing jtag_khz to 1000. 1500 gets intermittent faults. I notice on the scope the TCK is really slow to rise, very slopey at 1MHZ, where RTCK is fairly nice and square. Not why, I'm not a hardware guy. Maybe the JTAGKey-Tiny is struggling to drive this board with an extra chip on the chain compared with the DM355EVM. -- Jon Povey [email protected] Racelogic is a limited company registered in England. Registered number 2743719 . Registered Office Unit 10, Swan Business Centre, Osier Way, Buckingham, Bucks, MK18 1TB . The information contained in this electronic mail transmission is intended by Racelogic Ltd for the use of the named individual or entity to which it is directed and may contain information that is confidential or privileged. If you have received this electronic mail transmission in error, please delete it from your system without copying or forwarding it, and notify the sender of the error by reply email so that the sender's address records can be corrected. The views expressed by the sender of this communication do not necessarily represent those of Racelogic Ltd. Please note that Racelogic reserves the right to monitor e-mail communications passing through its network _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
