Am 07.07.2010 21:45, schrieb Øyvind Harboe:
Did you see this?
NOTE! Severe performance degradation without fast memory access
enabled. Type 'help fast'.
Well you're right!
If I enable fast_memory_access I get download speeds of 3kB/sec. If I
change the JTAG clock to 6000kHz in the interface configuration I get
4kB/sec. But I thought 6000kHz should not be possible on reset because
my crystal has only 18,432MHz so JTAG clock should be max. 3000kHz.
Is my event handler for reset-init not working correct? I would expect
after the reset-init event and setting PLL and JTAG clock the download
speed should increase to 4kB/sec
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