How this patch is implemented is not important. But some information will be helpful, I think. For example: I find that after dap_to_swd sequence, some idles bits should be added. Maybe it will be a method to try if a lot of "CTRL/STAT error" are received.
2010/8/10 simon qian <[email protected]> > This patch is not for comming to openocd. > I just publish the patch for testing Versaloon driver, especially SWD > driver. > > All code is intended to be just simple, and working(hope it's working). > > APACC/DPACC for JTAG is a register. > But for SWD, it's only a bit in the request part (5.3.1 section of ADIv5 > doc): > APnDP A single bit, indicating whether the Debug Port or the Access Port > Access Register is to be > accessed. This bit is 0 for an DPACC access, or 1 for a APACC access. > So the simplest way to implement AP and DP on SWD is copy the code from > adi_v5_jtag.c and > take '0' as DPACC register and '1' as APACC register. And remove the define > of such "register" is > also very simple: > 1. remove scan functions > 2. add adi_swd_apacc_access and adi_swd_dpacc_access > original call with APACC register, will call adi_swd_apacc_access > original call with DPACC register, will call adi_swd_dpacc_access > 2010/8/10 David Brownell <[email protected]> > > One way you can tell this is very wrong is that it >> references JTAG-specific registers APACC/DPACC ... >> those concepts don't even exist with SWD. >> >> >> > > > -- > Best Regards, SimonQian > http://www.SimonQian.com <http://www.simonqian.com/> > -- Best Regards, SimonQian http://www.SimonQian.com
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