Hi all,
there has been some time that I posted similar post, and I was
wondering if anybody has some information on the subject. I have been
trying without success to figure out this code, but without
appropriate comments it seems too complex.
Resolving this issue of reading/writing CP15 co-processor would help
me manipulate the caches, and then adding ARM946E target should be
straight forward.
I am prepared to post a patch as soon as I have all the pieces solved,
CP15 manipulation being the biggest of all.
Any help will be highly appreciated. Thanks.
Can anybody please explain me in the more details arm966e_read_cp15()
function (or arm920t_read_cp15()).
While fileds manipulation is intuitive, I do not get :
1) Why do we have to call jtag_add_dr_scan() two times, first time
with fields[1].in_value = NULL, other time set to correct var to which
we want to capture CP15 register value. What are we doing first time,
and what the second ? For write CP15 functions we do
jtag_add_dr_scan() only once,
2) Why do we put pointer to value variable in 6 bits address fields ?
Should not we put it to 32 bit value fields, i.e. fields[0].in_value ?
3) What is jtag_add_callback(arm_le_to_h_u32,
(jtag_callback_data_t)value) doing ? Why does it force little endian,
and how to change this since ARM946E-S is big endian.
4) What is jtag_execute_queue() ectually doing and why is is used only
for debug ?
BR,
Drasko
N.B. function code pasted below :
static int arm966e_read_cp15(struct target *target, int reg_addr,
uint32_t *value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
struct arm_jtag *jtag_info = &arm7_9->jtag_info;
struct scan_field fields[3];
uint8_t reg_addr_buf = reg_addr & 0x3f;
uint8_t nr_w_buf = 0;
if ((retval = arm_jtag_scann(jtag_info, 0xf, TAP_IDLE)) != ERROR_OK)
{
return retval;
}
retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL,
TAP_IDLE);
if (retval != ERROR_OK)
return retval;
fields[0].num_bits = 32;
/* REVISIT: table 7-2 shows that bits 31-31 need to be
* specified for accessing BIST registers ...
*/
fields[0].out_value = NULL;
fields[0].in_value = NULL;
fields[1].num_bits = 6;
fields[1].out_value = ®_addr_buf;
fields[1].in_value = NULL;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].in_value = NULL;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
fields[1].in_value = (uint8_t *)value;
jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_IDLE);
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)value);
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
}
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
#endif
return ERROR_OK;
}
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