Hi Øyvind,
I am trying to figure out how to do similar for mips_ejtag_drscan_32().
I added :
void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data)
{
struct jtag_tap *tap;
tap = ejtag_info->tap;
assert(tap != NULL);
struct scan_field field;
field.num_bits = 32;
field.out_value = (uint8_t *)&data;
field.in_value = NULL;
jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
}
And than started replacing for example
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl) with
mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl), but that does not
seem to be working.
I do not quite get this procedure.
What could be the gain in performance ?
At which moment is the queue pushed out on the line in this case ?
BR,
Drasko
On Fri, Apr 1, 2011 at 12:02 AM, Øyvind Harboe <[email protected]> wrote:
> Do not require unecessary roundtrips for clocking out
> data.
>
> Signed-off-by: Øyvind Harboe <[email protected]>
> ---
> src/flash/nor/pic32mx.c | 9 +++------
> src/target/mips_ejtag.c | 17 +++++++++++++++--
> src/target/mips_ejtag.h | 1 +
> src/target/mips_m4k.c | 8 ++------
> 4 files changed, 21 insertions(+), 14 deletions(-)
>
> diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
> index 89fe9b0..b3c6da3 100644
> --- a/src/flash/nor/pic32mx.c
> +++ b/src/flash/nor/pic32mx.c
> @@ -774,11 +774,9 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
> }
>
> /* unlock/erase device */
> - mchip_cmd = MCHP_ASERT_RST;
> - mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
> + mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
>
> - mchip_cmd = MCHP_ERASE;
> - mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
> + mips_ejtag_drscan_8_out(ejtag_info, MCHP_ERASE);
>
> do {
> mchip_cmd = MCHP_STATUS;
> @@ -791,8 +789,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
> alive_sleep(1);
> } while ((mchip_cmd & (1 << 2)) || (!(mchip_cmd & (1 << 3))));
>
> - mchip_cmd = MCHP_DE_ASSERT_RST;
> - mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
> + mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST);
>
> /* select ejtag tap */
> mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
> diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
> index 9df8a02..087be07 100644
> --- a/src/target/mips_ejtag.c
> +++ b/src/target/mips_ejtag.c
> @@ -146,11 +146,24 @@ int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info,
> uint32_t *data)
>
> *data = buf_get_u32(field.in_value, 0, 32);
>
> - keep_alive();
> -
> return ERROR_OK;
> }
>
> +void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data)
> +{
> + struct jtag_tap *tap;
> + tap = ejtag_info->tap;
> + assert(tap != NULL);
> +
> + struct scan_field field;
> +
> + field.num_bits = 8;
> + field.out_value = &data;
> + field.in_value = NULL;
> +
> + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
> +}
> +
> static int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
> {
> static const uint32_t code[] = {
> diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
> index 63b6093..aa890d2 100644
> --- a/src/target/mips_ejtag.h
> +++ b/src/target/mips_ejtag.h
> @@ -137,6 +137,7 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
> int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
> int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
> int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
> +void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data);
> int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);
> int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t,
> uint32_t *data);
>
> diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
> index 10d3c7d..7530cbd 100644
> --- a/src/target/mips_m4k.c
> +++ b/src/target/mips_m4k.c
> @@ -254,18 +254,14 @@ static int mips_m4k_assert_reset(struct target *target)
> {
> if (mips_m4k->is_pic32mx)
> {
> - uint32_t mchip_cmd;
> -
> LOG_DEBUG("Using MTAP reset to reset processor...");
>
> /* use microchip specific MTAP reset */
> mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
> mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
>
> - mchip_cmd = MCHP_ASERT_RST;
> - mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
> - mchip_cmd = MCHP_DE_ASSERT_RST;
> - mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
> + mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
> + mips_ejtag_drscan_8_out(ejtag_info,
> MCHP_DE_ASSERT_RST);
> mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
> }
> else
> --
> 1.7.0.4
>
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