Hi, I have made a try to add stm32f2xx and st3220e_eval support in the
scripts, but being my first attempt I expect that there might be
something that could do in a better way. Could anyone have a look and
consider if it can be added?
//Magnus
diff --git a/tcl/board/stm3220e_eval.cfg b/tcl/board/stm3220e_eval.cfg
new file mode 100755
index 0000000..0298f10
--- /dev/null
+++ b/tcl/board/stm3220e_eval.cfg
@@ -0,0 +1,5 @@
+
+set FLASH_DRV stm32f2xxx
+
+source [find target/stm32.cfg]
+
diff --git a/tcl/target/stm32.cfg b/tcl/target/stm32.cfg
index 9879c04..d9a0c89 100644
--- a/tcl/target/stm32.cfg
+++ b/tcl/target/stm32.cfg
@@ -1,75 +1,91 @@
-# script for stm32
-
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME stm32
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-# Work-area is a space in RAM used for flash programming
-# By default use 16kB
-if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
-} else {
- set _WORKAREASIZE 0x4000
-}
-
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG =
1MHz
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-jtag_ntrst_delay 100
-
-#jtag scan chain
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- # See STM Document RM0008
- # Section 26.6.3
- set _CPUTAPID 0x3ba00477
-}
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
-
-if { [info exists BSTAPID ] } {
- # FIXME this never gets used to override defaults...
- set _BSTAPID $BSTAPID
-} else {
- # See STM Document RM0008
- # Section 29.6.2
- # Low density devices, Rev A
- set _BSTAPID1 0x06412041
- # Medium density devices, Rev A
- set _BSTAPID2 0x06410041
- # Medium density devices, Rev B and Rev Z
- set _BSTAPID3 0x16410041
- set _BSTAPID4 0x06420041
- # High density devices, Rev A
- set _BSTAPID5 0x06414041
- # Connectivity line devices, Rev A and Rev Z
- set _BSTAPID6 0x06418041
- # XL line devices, Rev A
- set _BSTAPID7 0x06430041
-}
-jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
- -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
- -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
- -expected-id $_BSTAPID6 -expected-id $_BSTAPID7
-
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position
$_TARGETNAME
-
-$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
-
-# flash size will be probed
-set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME stm32x 0x08000000 0 0 0 $_TARGETNAME
-
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m3 reset_config sysresetreq
+# script for stm32
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME stm32
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+# Work-area is a space in RAM used for flash programming
+# By default use 16kB
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+if { [info exists FLASH_DRV ] } {
+ #one interesting value to set could be: stm32f2xxx
+ set _FLASH_DRV $FLASH_DRV
+} else {
+ set _FLASH_DRV stm32x
+}
+
+
+
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG =
1MHz
+adapter_khz 1000
+
+adapter_nsrst_delay 100
+jtag_ntrst_delay 100
+
+
+
+
+#STM32F2xx
+set _CPUTAPID_2xx 0x4ba00477
+
+#STM32F1xx
+set _CPUTAPID_1xx 0x3ba00477
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
+ -expected-id $_CPUTAPID_1xx \
+ -expected-id $_CPUTAPID_2xx
+
+
+if { [info exists BSTAPID ] } {
+ # FIXME this never gets used to override defaults...
+ set _BSTAPID $BSTAPID
+} else {
+ # See STM Document RM0008
+ # Section 29.6.2
+ # Low density devices, Rev A
+ set _BSTAPID1 0x06412041
+ # Medium density devices, Rev A
+ set _BSTAPID2 0x06410041
+ # Medium density devices, Rev B and Rev Z
+ set _BSTAPID3 0x16410041
+ set _BSTAPID4 0x06420041
+ # High density devices, Rev A
+ set _BSTAPID5 0x06414041
+ # Connectivity line devices, Rev A and Rev Z
+ set _BSTAPID6 0x06418041
+ # XL line devices, Rev A
+ set _BSTAPID7 0x06430041
+ # STM32F2XX
+ set _BSTAPID8 0x06411041
+}
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+ -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+ -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
+ -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
+ -expected-id $_BSTAPID8
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position
$_TARGETNAME
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+
+# flash size will be probed
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME $_FLASH_DRV 0x08000000 0 0 0 $_TARGETNAME
+
+# if srst is not fitted use SYSRESETREQ to
+# perform a soft reset
+cortex_m3 reset_config sysresetreq
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