On 06/07/2011 10:53, Luc ANTOLINOS wrote:
On 6 July 2011 11:08, Spencer Oliver <[email protected]
<mailto:[email protected]>> wrote:
> I'm working with an LPC2388 (arm7tdmi-s core). I use the "IDLE"
power mode
Have you tried reducing the jtag clock?
Hi,
I've try the following settings :
- jtag_khz 1 ==> Still can not halt or reset the board
- jtag_rclk 1 ==> "RCLK not supported - fallback to 1 kHz"
- adapter_khz 0 ==> "in procedure 'adapter_khz'" (I suppose this is an
incomplete error message displayed), but when requesting "adpater_khz" I
get "RCLK", but I suppose the settings has not really been changed.
Here is a sequence of try :
(gdb) monitor jtag_khz 1
1 kHz
(gdb) monitor halt
Halt timed out, wake up GDB.
timed out while waiting for target halted
in procedure 'halt'
(gdb) monitor jtag_rclk 1
RCLK not supported - fallback to 1 kHz
(gdb) monitor adapter_khz 0
in procedure 'adapter_khz'
(gdb) monitor adapter_khz
RCLK - adaptive
(gdb) monitor halt
Halt timed out, wake up GDB.
timed out while waiting for target halted
in procedure 'halt'
Can you provide a full openocd log?
It may be worth at this point to use telnet until we get a better idea
of the issue.
Cheers
Spen
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