There are some older atmel nor chips which have negated logic for
TopBottom detection. This patch adds a special handling for the old
chips. This is the same mechanism as implemented in linux kernel.

Signed-off-by: Andreas Bießmann <[email protected]>
---
 src/flash/nor/cfi.c |   21 +++++++++++++++++----
 1 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 3f1fbab..f854dd6 100644
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -42,6 +42,10 @@
 /* defines internal maximum size for code fragment in cfi_intel_write_block() 
*/
 #define CFI_MAX_INTEL_CODESIZE 256
 
+/* some id-types with specific handling */
+#define AT49BV6416     0x00d6
+#define AT49BV6416T    0x00d2
+
 static struct cfi_unlock_addresses cfi_unlock_addresses[] =
 {
        [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
@@ -700,10 +704,19 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
        if (atmel_pri_ext.features & 0x02)
                pri_ext->EraseSuspend = 2;
 
-       if (atmel_pri_ext.bottom_boot)
-               pri_ext->TopBottom = 2;
-       else
-               pri_ext->TopBottom = 3;
+       /* some chips got it backwards... */
+       if (cfi_info->device_id == AT49BV6416 ||
+           cfi_info->device_id == AT49BV6416T) {
+               if (atmel_pri_ext.bottom_boot)
+                       pri_ext->TopBottom = 3;
+               else
+                       pri_ext->TopBottom = 2;
+       } else {
+               if (atmel_pri_ext.bottom_boot)
+                       pri_ext->TopBottom = 2;
+               else
+                       pri_ext->TopBottom = 3;
+       }
 
        pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
        pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2;
-- 
1.7.6

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