Moin,
Has anyone got a Atmel SAM3N (N, not U) working with OpenOCD?
SAM3U works with OpenOCD 0.5.0, but not with SAM3N.
The device is properly detected, but when accessing the flash, OpenOCD
hangs indefinitely.
See the attached script I use and its output.
If anyone could give me a hint how to get the SAM3N working or how
to debug the problem, i'd appreaciate it.
Attila Kinali
--
The trouble with you, Shev, is you don't say anything until you've saved
up a whole truckload of damned heavy brick arguments and then you dump
them all out and never look at the bleeding body mangled beneath the heap
-- Tirin, The Dispossessed, U. Le Guin
# ***************************************************************************
#
# Customer: AoT
# Project#: 00-00
# Name: AOT_SW Framework
#
# Module: OpenOCD config file template
# State:
# Originator: Gillen
#
# $HeadURL:
svn://192.168.0.100/aot/Software/SIPA/WZU/trunk/sam3_armusbocd_script.template $
# $Revision: 12290 $
# $Date: 2011-09-20 15:32:11 +0200 (Di, 20 Sep 2011) $
# $Author: Gillen $
#
# Developed by Art of Technology AG, 2010
#
# ****************************************************************************
#
# Version History:
# Version 0.10: Initial version, adapted from OpenOCD templates
# This version is intended for tcl based OpenOCD >= version 3.0
#
# For more information about the configuration files, take a
# look at the "Open On-Chip Debugger (openocd)" documentation.
#
# ****************************************************************************
# daemon configuration
telnet_port 4444
gdb_port 3333
tcl_port 6666
# debug_level 3
# tell gdb our flash memory map
# and enable flash programming
# gdb_memory_map enable
# gdb_flash_program enable
#########################################################
#
# JTAG-Interface, if you want to use an other interface
# you must replace this section here.
#
interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG"
ft2232_layout olimex-jtag
ft2232_vid_pid 0x15ba 0x0003
ft2232_latency 5
#########################################################
#
# Target section, this example was tested with an
# SIPA/WZU board.
#
# AT91SAM3N starts with 4 MHz RC clock, no speedup foreseen
jtag_khz 15
# use combined on interfaces or targets that can't set TRST/SRST separately
# reset_config trst_and_srst
# reset_config trst_only srst_gates_jtag
# Best setting for SAM3UEK development board
reset_config trst_only
# reset_config trst_pulls_srst
#########################################################
# set some important constants
# Set CPU-ID seen over JTAG interface
# Attention: CPU-ID is chip specific
set _CPUTAPID 0x4ba00477
#########################################################
jtag newtap sam3n cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id
$_CPUTAPID
target create sam3n.cpu cortex_m3 -endian little -chain-position sam3n.cpu
echo "haha"
sam3n.cpu configure -event reset-start {
echo "hehe"
# Very important, will not run without this delay!
jtag_ntrst_delay 100
echo "Configure"
# Set Flash timing to 6 wait states (silicon bug)
# mdw 0x400E0A00
# mww 0x400E0A00 0x00000600
# set RC clock to 12 MHz,
# mww 0x400E0420 0x00370028
# mww 0x400E0430 0x00000001 # Strange: This is MAINCK as source, but does
not work
# Setting readout says: Clock comes from PLLA!
jtag_khz 1000
}
sam3n.cpu configure -event gdb-flash-erase-start {
halt
}
# 8K is plenty, the smallest chip has this much
sam3n.cpu configure -work-area-virt 0 -work-area-phys 0x20000000
-work-area-size 8192 -work-area-backup 0
echo "Flash bank access"
# size is automatically "calculated" by probing
flash bank sam3.flash at91sam3 0x00400000 0 1 1 sam3n.cpu
echo "Flash bank access DONE"
###################### target end #######################
###################### procedures #######################
# Reset the processor as hard as possible
proc X_ucReset { } {
echo "Resetting uC"
reset run
# sleep 500
# jtag_reset 1 1
# sleep 500
# jtag_reset 0 0
}
# Report the actual processor status
proc X_ucStatus { state } {
echo "CPU-Status($state) = [sam3n.cpu curstate]"
}
# Report the JTAG scan line
proc X_JTAG_Info { } {
echo " "
echo "JTAG info"
targets
echo "END JTAG Info"
}
# Report the Flash infos
proc X_Flash_Info { bank } {
if { $bank == 0 } {
echo " "
echo "FLASH BANKS"
flash banks
}
echo " "
echo "FLASH INFO BANK $bank"
flash info $bank
echo "END Flash Info Bank $bank"
}
###################### procedures end ###################
echo "pre init"
init
echo "post init"
#reset init
echo "post init "
X_ucStatus 0
reset
X_ucStatus 1
soft_reset_halt
X_ucStatus 2
soft_reset_halt
X_ucStatus 3
echo " "
echo "JTAG info "
targets
echo " "
echo "GPNV-Bits: 0: Security (0=Off), 1: Boot (0=SAMABA 1=Flash), 2:BootFlash
(0=Flash0)"
at91sam3 gpnvm show all
echo " "
echo "FLASH BANKS"
flash banks
echo " "
echo "FLASH INFO BANK 0"
flash info 0
echo "FLASH INFO BANK 1"
flash info 1
echo " "
echo "DAP INFO"
dap info
echo " "
sleep 10
X_ucReset
X_ucStatus 3
shutdown
echo "OCD daemon down ..."
make systeminfo
-------- CONFIGURATION OVERVIEW ----------------------
Target:STANDALONE_APPLICATION
Board:WZU_01
Processor:AT91SAM3N1/cortex-m3
Debug:YES
FreeMemoryEstimator:NO
Traces:TRACES_FULL
Tracelevel:TR_INFO
Tracedebuglevel:TR_DEBUG_NO
------------------------------------------------------
----------------------------------------------------
!!! Check for correct settings of SHELL variable !!!
SHELL: _C:/Programs/OpenOCD/utils/bin/sh.exe_
XSHELL: _C:/Programs/OpenOCD/utils/bin/sh.exe_
----------------------------------------------------
Display system info
C:/Programs/OpenOCD/utils/bin/cp sam3n_armusbocd_script.template
armusbocd.script
C:/Programs/OpenOCD/bin/openocd.exe -f armusbocd.script
Open On-Chip Debugger 0.5.0 (2011-08-09-23:21)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
15 kHz
trst_only separate trst_push_pull
haha
Flash bank access
Flash bank access DONE
pre init
Info : clock speed 15 kHz
Info : JTAG tap: sam3n.cpu tap/device found: 0x4ba00477 (mfg: 0x23b, part:
0xba00, ver: 0x4)
<<< hang up here >>>
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