On Thu, Dec 15, 2011 at 3:57 PM, Matthew Hicks <[email protected]> wrote:
> The method I used is just as synthesizable as the readmem tasks, plus you
> don't need to keep an external file. The method I used is also more modular
> and scalable than readmem.
>
> I agree that a better fix is to correct the OR32 boot code, but I also like
> initializing the memories to make RTL simulation closer to hardware
> execution.
>
If you want to make the RTL simulation closer to what you experience
with hardware, I would fill the RAMs with random values, not zeroes.
Sometimes it's good to have X go everywhere, because it doesn't let
you get away with not initialising things properly. In this case I
think X is a good thing.
In what way is the Linux boot code not compatible with RTL simulation,
ie where is it using registers before initialising them?
Thanks,
Julius
>
> ---Matthew Hicks
>
>
> On Wed, Dec 14, 2011 at 10:09 PM, Pekon Gupta <[email protected]> wrote:
>>
>> Hi Mathew,
>>
>> Instead of adding non-synthesizable constructs in RTL files.. I think its
>> better you use $readmemh() to preload all caches to 0 in your simulation
>> environment..
>> OR
>> Anyways in actual practice, the fore-most instructions of any boot-loader
>> is to invalidate caches.. which can be added to the boot code..
>>
>>
>> with regards, pekon
>>
>> -------------------------------------------------
>>
>> On Thu, Dec 15, 2011 at 3:18 AM, Matthew Hicks <[email protected]>
>> wrote:
>>>
>>> Below is a patch that is required to allow Linux to boot in an RTL
>>> simulation. The memories used for the TLBs, caches, and for the register
>>> file must be set to zero (or some binary string), otherwise, the default 'X'
>>> values cause simulation to lock.
>>>
>>> Index: or1200_spram.v
>>> ===================================================================
>>> --- or1200_spram.v (revision 672)
>>> +++ or1200_spram.v (working copy)
>>> @@ -116,6 +116,13 @@
>>> //
>>> //assign doq = (oe) ? mem[addr_reg] : {dw{1'b0}};
>>> assign doq = mem[addr_reg];
>>> +
>>> + integer k;
>>> + initial begin
>>> + for(k = 0; k < (1 << aw); k = k + 1) begin
>>> + mem[k] = 0;
>>> + end
>>> + end
>>>
>>> //
>>> // RAM read address register
>>> Index: or1200_dpram.v
>>> ===================================================================
>>> --- or1200_dpram.v (revision 672)
>>> +++ or1200_dpram.v (working copy)
>>> @@ -123,8 +123,14 @@
>>> //
>>> //assign do_a = (oe_a) ? mem[addr_a_reg] : {dw{1'b0}};
>>> assign do_a = mem[addr_a_reg];
>>> +
>>> + integer k;
>>> + initial begin
>>> + for(k = 0; k < (1 << aw); k = k + 1) begin
>>> + mem[k] = 0;
>>> + end
>>> + end
>>>
>>> -
>>> //
>>> // RAM read
>>> //
>>>
>>>
>>> ---Matthew Hicks
>>>
>>> _______________________________________________
>>> OpenRISC mailing list
>>> [email protected]
>>> http://lists.openrisc.net/listinfo/openrisc
>>>
>>
>
>
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