On Mon, Feb 20, 2012 at 10:45 PM, Olof Kindgren <[email protected]> wrote: > 2012/2/21 Jason Zheng <[email protected]>: >>> we have mailing lists that are more suited than the forums for this kind >>> of communication, I have put them in CC. >> >> Sorry, should've looked for the mailing lists first. >> >>> Please use _r to describe a registered signal, to keep it consistent with >>> the current code. >> >> Done. >> >>> While I agree with the change and it would be easy change to just drop in, >>> the preferred workflow is to have patches posted to the mailinglist(s). >>> So, If you could post a patch to the addresses I put in the CC field, >>> it would be great. >> >> Done. Let me know if the format is conforming (or not). >> >> ~Jason >> >> _______________________________________________ >> Openrisc mailing list >> [email protected] >> http://lists.opencores.org/listinfo/openrisc >> > > > This looks good to me. Feel free to apply, or give me a ping if I should do it > > -- > Olof Kindgren > ______________________________________________ > ORSoC > Website: www.orsoc.se > Email: [email protected] > ______________________________________________ > FPGA, ASIC, DSP - embedded SoC design
I'm new to this project and have no svn commit privilege, so I'm assuming you were addressing Stefan. Not sure what the proper introduction etiquette is here but I am a PhD student at UCLA and I have about 8 years of experience in digital design in Verilog. Yesterday I also submitted a patch to split the datapath in the mult/div/mac unit because the merged datapath gave a lot of false path setup violations in the timing analysis. Would like to get your comment on that. ~Jason _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
