Hey,
Using the l.lws instruction doesn't work currently. It simply skips the
instruction. No exception or reaction.
The patch attached simply duplicates the behaviour of l.lwz for l.lws.
It seems to compile, but I cannot test it currently.
Regards,
Jeppe
Index: rtl/verilog/or1200_ctrl.v
===================================================================
--- rtl/verilog/or1200_ctrl.v (revision 673)
+++ rtl/verilog/or1200_ctrl.v (working copy)
@@ -275,7 +275,8 @@
id_simm = {{16{id_insn[15]}}, id_insn[15:0]};
// l.lxx (load instructions)
- `OR1200_OR32_LWZ, `OR1200_OR32_LBZ, `OR1200_OR32_LBS,
+ `OR1200_OR32_LWZ, `OR1200_OR32_LWS,
+ `OR1200_OR32_LBZ, `OR1200_OR32_LBS,
`OR1200_OR32_LHZ, `OR1200_OR32_LHS:
id_simm = {{16{id_insn[15]}}, id_insn[15:0]};
@@ -684,6 +685,7 @@
`OR1200_OR32_MACI,
`endif
`OR1200_OR32_LWZ,
+ `OR1200_OR32_LWS,
`OR1200_OR32_LBZ,
`OR1200_OR32_LBS,
`OR1200_OR32_LHZ,
@@ -959,6 +961,10 @@
`OR1200_OR32_LWZ:
rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};
+ // l.lws
+ `OR1200_OR32_LWS:
+ rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};
+
// l.lbz
`OR1200_OR32_LBZ:
rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};
@@ -1096,6 +1102,10 @@
`OR1200_OR32_LWZ:
id_lsu_op = `OR1200_LSUOP_LWZ;
+ // l.lws
+ `OR1200_OR32_LWS:
+ id_lsu_op = `OR1200_LSUOP_LWS;
+
// l.lbz
`OR1200_OR32_LBZ:
id_lsu_op = `OR1200_LSUOP_LBZ;
Index: rtl/verilog/or1200_defines.v
===================================================================
--- rtl/verilog/or1200_defines.v (revision 673)
+++ rtl/verilog/or1200_defines.v (working copy)
@@ -699,6 +699,7 @@
`define OR1200_OR32_MACI 6'b010011
/* */
`define OR1200_OR32_LWZ 6'b100001
+`define OR1200_OR32_LWS 6'b100010
`define OR1200_OR32_LBZ 6'b100011
`define OR1200_OR32_LBS 6'b100100
`define OR1200_OR32_LHZ 6'b100101
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