Hello
I have Xilinx Spartan3A1800DSP Board with Xilinx Platform Cable USB II.
I downloaded the archive from repositories / svn co
http://opencores.org/ocsvn/openrisc/openrisc/trunk/or1200 /
I create orpsoc.bit file and loading him to fpga.
Then i start adv_jtag_bridge proxy, but i have error:
/$ ./adv_jtag_bridge -b /opt/Xilinx/13.4/ISE_DS/ISE/spartan3adsp/data/
xpc_usb
Found Xilinx Platform Cable USB (DLC9)
Found Xilinx Platform Cable USB (DLC9)
XPC USB driver opening cable
firmware version = 0x0961 (2401)
cable CPLD version = 0xFFFE (65534)
Enumerating JTAG chain...
Devices on JTAG chain:
Index Name ID Code IR Length
----------------------------------------------------------------
0: XC3SD1800A_FG676 0x03840093 6
Target device 0, JTAG ID = 0x03840093
Xilinx IDCODE, assuming internal BSCAN mode
(using USER1 instead of DEBUG TAP command)
IDCODE sanity test passed, chain OK!
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 0 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 1 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 2 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 3 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 4 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 5 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 6 at startup! 'max retries'
Burst read timed out.
Retry count exceeded in burst read!
ERROR reading DCR 7 at startup! 'max retries'
No watchpoint hardware found, HWP server not starting
JTAG bridge ready!
^C
kruger@t60p:/usr/local/bin$ /
/$ ./adv_jtag_bridge -b /opt/Xilinx/13.4/ISE_DS/ISE/spartan3adsp/data/ -t
xpc_usb
Found Xilinx Platform Cable USB (DLC9)
Found Xilinx Platform Cable USB (DLC9)
XPC USB driver opening cable
firmware version = 0x0961 (2401)
cable CPLD version = 0xFFFE (65534)
Enumerating JTAG chain...
Devices on JTAG chain:
Index Name ID Code IR Length
----------------------------------------------------------------
0: XC3SD1800A_FG676 0x03840093 6
Target device 0, JTAG ID = 0x03840093
Xilinx IDCODE, assuming internal BSCAN mode
(using USER1 instead of DEBUG TAP command)
IDCODE sanity test passed, chain OK!
*** Doing self-test ***
Stall or1k - or1k is not stalled!
Self-test FAILED *** Bailing out!/
I will be grateful for any help!
PS: adv_jtag_bridzhe is the only varint debug programs on the board (with
Xilinx USB Cable) ?
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