> [...]
> instructions are not being disassembled properly in the trace, even > though they appear to be simulated correctly. This does not happen > for every instruction. A lot of them are disassembled just fine. > [...] I am having the same problem with or1ksim too. I also reported here a while ago a similar issue with GDB. Cheers, rdiez _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
