Declare pcreg_boot before usage. This error was introduced in revision
813 when some things were moved around

Index: rtl/verilog/or1200_genpc.v
===================================================================
--- rtl/verilog/or1200_genpc.v  (revision 850)
+++ rtl/verilog/or1200_genpc.v  (working copy)
@@ -265,6 +265,10 @@
        endcase
      end

+   // select async. value for pcreg after reset - PC jumps to the
address selected
+   // after boot.
+   wire [31:0] pcreg_boot = boot_adr;
+
    //
    // PC register
    //
@@ -289,10 +293,6 @@
        pcreg_default <=  pc[31:2];
      end

-   // select async. value for pcreg after reset - PC jumps to the
address selected
-   // after boot.
-   wire [31:0] pcreg_boot = boot_adr;
-
    always @(pcreg_boot or pcreg_default or pcreg_select)
      if (pcreg_select)
        // async. value is selected due to reset state


-- 
Olof Kindgren
______________________________________________
ORSoC
Website: www.orsoc.se
Email: [email protected]
______________________________________________
FPGA, ASIC, DSP - embedded SoC design
_______________________________________________
OpenRISC mailing list
[email protected]
http://lists.openrisc.net/listinfo/openrisc

Reply via email to