Hi, I'm trying to port the current working GDB 7.2 openrisc port to our new CGEN based toolchain. It works but it's not perfect for now.
I have a question regarding CGEN opcodes. In GDB, when the arch has delay slot, - /* Decode the previous instruction to see if it was a branch or a jump, and - hence we are in a delay slot. */ - index = insn_decode (or32_fetch_instruction (gdbarch, ppc)); - return or32_opcodes[index].flags & OR32_IF_DELAY; + insns = cgen_lookup_insn (gdb_cgen_cpu_desc, + NULL, + or32_fetch_instruction (gdbarch, ppc), + NULL, + 32, + &tmp_fields, + 0); + + /* TODO: we should add a delay slot flag to the CGEN_INSN and remove + * this hard coded test. */ + return ((CGEN_INSN_NUM(insns) == OR1K_INSN_L_J) || + (CGEN_INSN_NUM(insns) == OR1K_INSN_L_JAL) || + (CGEN_INSN_NUM(insns) == OR1K_INSN_L_JR) || + (CGEN_INSN_NUM(insns) == OR1K_INSN_L_JALR) || + (CGEN_INSN_NUM(insns) == OR1K_INSN_L_BNF) || + (CGEN_INSN_NUM(insns) == OR1K_INSN_L_BF)); _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
