As a person that has to deal with or1200_monitor on a regular basis, this files is a nightmare and of limited use to beginners. What are people's thoughts on breaking each monitor into its own aptly named file that can then be included in the main monitor file as needed? Some documentation would also be nice :).
---Matthew Hicks On Sat, Jul 13, 2013 at 7:03 PM, Olof Kindgren <[email protected]>wrote: > or1200-monitor contains the tasks display_arch_state and > display_arch_state_except which are almost identical. This patch merges > these two tasks into one, with a parameter to specify whether it should > print out "(exception)" or not. > > Index: or1200_monitor.v > =================================================================== > --- or1200_monitor.v (revision 863) > +++ or1200_monitor.v (working copy) > @@ -134,6 +134,8 @@ > // are supported > // > task display_arch_state; > + input exception; > + > reg [5:0] i; > reg [31:0] r; > integer j; > @@ -143,13 +145,20 @@ > `ifdef OR1200_MONITOR_LOOKUP > $fdisplay(flookup, "Instruction %d: %t", insns, $time); > `endif > - $fwrite(fexe, "\nEXECUTED(%d): %h: %h", insns, > - `OR1200_TOP.`CPU_cpu.`CPU_except.wb_pc, > - `OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn); > + if(exception) > + $fwrite(fexe, "\nEXECUTED(%d): %h: %h (exception)", insns, > + `OR1200_TOP.`CPU_cpu.`CPU_except.ex_pc, > + `OR1200_TOP.`CPU_cpu.`CPU_ctrl.ex_insn); > + else > + $fwrite(fexe, "\nEXECUTED(%d): %h: %h", insns, > + `OR1200_TOP.`CPU_cpu.`CPU_except.wb_pc, > + `OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn); > `ifdef OR1200_MONITOR_EXEC_LOG_DISASSEMBLY > - $fwrite(fexe,"\t"); > - // Decode the instruction, print it out > - or1200_print_op(`OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn); > + if(!exception) begin > + $fwrite(fexe,"\t"); > + // Decode the instruction, print it out > + or1200_print_op(`OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn); > + end > `endif > for(i = 0; i < 32; i = i + 1) begin > if (i % 4 == 0) > @@ -167,13 +176,6 @@ > r = `OR1200_TOP.`CPU_cpu.`CPU_sprs.esr; > $fdisplay(fexe, "ESR0 : %h", r); > `endif // `ifdef OR1200_MONITOR_EXEC_STATE > -`ifdef OR1200_DISPLAY_EXECUTED > - ref = ref + 1; > - `ifdef OR1200_MONITOR_LOOKUP > - $fdisplay(flookup, "Instruction %d: %t", insns, $time); > - `endif > - $fwrite(fexe, "\nEXECUTED(%d): %h: %h", insns, > `OR1200_TOP.`CPU_cpu.`CPU_except.wb_pc, > `OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn); > -`endif > insns = insns + 1; > end > endtask // display_arch_state > @@ -233,52 +235,6 @@ > end > endtask // monitor_for_crash > > - > - // > - // Write state of the OR1200 registers into a file; version for > exception > - // > - task display_arch_state_except; > - reg [5:0] i; > - reg [31:0] r; > - integer j; > - begin > -`ifdef OR1200_MONITOR_EXEC_STATE > - ref = ref + 1; > - `ifdef OR1200_MONITOR_LOOKUP > - $fdisplay(flookup, "Instruction %d: %t", insns, $time); > - `endif > - $fwrite(fexe, "\nEXECUTED(%d): %h: %h (exception)", insns, > `OR1200_TOP.`CPU_cpu.`CPU_except.ex_pc, > `OR1200_TOP.`CPU_cpu.`CPU_ctrl.ex_insn); > - for(i = 0; i < 32; i = i + 1) begin > - if (i % 4 == 0) > - $fdisplay(fexe); > - get_gpr(i, r); > - $fwrite(fexe, "GPR%d: %h ", i, r); > - end > - $fdisplay(fexe); > - r = `OR1200_TOP.`CPU_cpu.`CPU_sprs.sr; > - $fwrite(fexe, "SR : %h ", r); > - r = `OR1200_TOP.`CPU_cpu.`CPU_sprs.epcr; > - $fwrite(fexe, "EPCR0: %h ", r); > - r = `OR1200_TOP.`CPU_cpu.`CPU_sprs.eear; > - $fwrite(fexe, "EEAR0: %h ", r); > - r = `OR1200_TOP.`CPU_cpu.`CPU_sprs.esr; > - $fdisplay(fexe, "ESR0 : %h", r); > - insns = insns + 1; > -`endif // `ifdef OR1200_MONITOR_EXEC_STATE > -`ifdef OR1200_DISPLAY_EXECUTED > - ref = ref + 1; > - `ifdef OR1200_MONITOR_LOOKUP > - $fdisplay(flookup, "Instruction %d: %t", insns, $time); > - `endif > - $fwrite(fexe, "\nEXECUTED(%d): %h: %h (exception)", insns, > - `OR1200_TOP.`CPU_cpu.`CPU_except.ex_pc, > - `OR1200_TOP.`CPU_cpu.`CPU_ctrl.ex_insn); > - insns = insns + 1; > -`endif > - > - end > - endtask > - > integer iwb_progress; > reg [31:0] iwb_progress_addr; > // > @@ -383,12 +339,12 @@ > & !(`OR1200_TOP.`CPU_cpu.`CPU_except.except_flushpipe & > `OR1200_TOP.`CPU_cpu.`CPU_except.ex_dslot)) > begin > - display_arch_state; > + display_arch_state(0); > monitor_for_crash; > end > else > if (`OR1200_TOP.`CPU_cpu.`CPU_except.except_flushpipe) > - display_arch_state_except; > + display_arch_state(1); > // small hack to stop simulation (l.nop 1): > if (`OR1200_TOP.`CPU_cpu.`CPU_ctrl.wb_insn == 32'h1500_0001) begin > get_gpr(3, r3); > > > _______________________________________________ > OpenRISC mailing list > [email protected] > http://lists.openrisc.net/listinfo/openrisc > >
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