On 23/09/13 19:29, Hassan Nawaz wrote:
Hello,
I will be really thankful to you if spare your precious time
for this mail. I am a student of Electronic Engineering, currently in
the third year of my bachelors program, in NED University of Engineering
and Technology, Karachi, Pakistan.
Actually I was planning to work on FPGA Implementation of a
64-Bit RISC Soft-Processor Core as my Final Year Engineering Project,
and in this regard I am flooded with lots of queries and problems, it
will be kind of you if you help.
1. First of all I want to know is this a bachelors level
project? Did you completed in your bachelors program?
2. Will we (me and my 3 other classmates) be able to complete
this project at this level of education and with in a limited time
period of 8 months?
3. What difficulties did you face when you were doing this
project?
4. Can you provide us any material that would be helpful for us?
5. What is the scope of this project, does it hit the job
market?
6. Anything else you want to tell us about this project?
Hi Hassan,
Potentially a big project. The OpenRISC 1000 architecture was conceived
as potentially supporting a 64-bit version, and trying to implement this
would be a reasonable project *if you are good*. All the material you
need is on the opencores website and wiki.
I suggest this is something you can best discuss on IRC. Channel
#openrisc on freenode.net.
HTH,
Jeremy
--
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