On Tue, Apr 29, 2014 at 3:48 PM, Jose Teixeira de Sousa <[email protected]> wrote: > Hi Stefan, > > see embedded comments: > >> >> >> mor1kx has a debug port, it's not specifically tied to adbg, but >> that's likely what will be used. >> What problem did you experience and could you provide a testcase where it >> fails. > > > Use the DE0 nano board or this branch > (https://github.com/openrisc/orpsoc-cores/pull/35) with Icarus or Verilator > (which I have > not had time to improve yet but works ok on 32 bit PCs and has not yet been > upgraded to 64-bit machines due to the elf loader problem recently solved). > > If you use either of these you will see that breakpoints and namely Step vs. > Next is not working properly. It does not do Next well. >
Both breakpoints and single stepping works for me on the de0 nano board with mor1kx, could you please be more precise? https://github.com/openrisc/orpsoc-cores/pull/35 is using or1200, I can't see how that's going to help debug an issue with mor1kx? > >> >> What are the problems with verilator and adbg? >> > > If you activate the Verilator switch to give all warnings you 'll see many > unacceptable stuff that backend ASIC engineers will simply refuse to go > forward with it. Moreover ADBG is a dead body in the chip if you're not > doing debug, which is not really compatible with a low energy approach, or > complicate matters with gate clocking to power it down etc. > What would you like to use as an alternative then? > In general it would be preferable to solve these sanitary issues first > (debug and profiling) before addressing more complex issues such as > multicore approaches. I am not by any means diminishing the tremendous stuff > that Stefan W. has just presented on the multicore front which certainly > very cool, but I always enjoy playing the janitor-in-chief role :-) > Sure, but then we need a clear picture of what the actual problem is. Stefan _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
