I hope you don't mind me sharing this job posting with the list - I appreciate nobody wants a mailing list filled with random job spam, but given there are so very few jobs in the area of open source chip design I thought the OpenRISC community may find this interesting.
As you may have seen, a group of us have started up the lowRISC project (http://www.lowrisc.org/) to produce an open source SoC, manufactured in volume. We have two open positions being advertised right now: <http://www.jobs.cam.ac.uk/job/4665/>. Enquiries should be sent to Robert Mullins ([email protected]), who is the project lead. Please do pass it on to any colleagues you think may be interested. Closing date for applications is the 9th September 2014. Thank you, Alex Text of the posting below: Fixed-term: The funds for this post are initially available for 1 year. It is expected that the project will run for at least 4 years and opportunities to extend the post are expected subject to the availability of funding. Two research associate positions are available in the Computer Laboratory at the University of Cambridge. The successful candidates will join the LowRISC project whose goal is to explore new architectures for robust, secure and low-complexity system-on-a-chip (SoC) designs. The project includes plans for the volume fabrication of silicon chips and the distribution of low-cost development boards. The project will contribute to the LowRISC open-source project (lowrisc.org). The duties and responsibilities of the post will be focused on the design and implementation of a novel SoC design. In particular, work will include: microprocessor design, the creation of novel programmable accelerators, the design of off-chip interfaces and the creation of FPGA prototypes and testing infrastructure. Novel hardware security mechanisms and instruction-set extensions for security are also an important element of the project that the successful candidates will be expected to pursue. They will work towards the tape-out of a prototype test-chip scheduled for 2015. This will involve the use of ASIC design tools. Ideal candidates will have industrial experience of SoC design or will hold, or shortly complete, a PhD in Computer Science or Engineering and have a strong publication record. The candidate should have a good understanding of computer architecture and also have practical experience in one or more of the following: ASIC implementation and simulation tools, low-power design, hardware description languages (e.g. SystemVerilog), FPGAs and processor design. Knowledge of computer security and system-on-a-chip architectures is also desirable. Specialists in the area of memory interface design are also sought. The post is intended to start on the 1st October, although some flexibility is possible. _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
