I ask because I have been puzzled by the 64-bit descriptions at several points, where it looks to me as though there is some suspicion that they may have been copy-pasted from the 32-bit description and modified only incompletely. My apologies if that is not the case, but I would welcome reassurance [Yes, I've checked through the "proposed changes"!]
For the MAC, MULD, etc instructions, for example, I gather from the text and formulae that the results of 64-bit multiplication are to be stored or accumulated as two 32-bit words in a MACHI and MACLO register. But there is no mention of that/those target register(s) that I can find except a reference to a "MAC unit" group (#5) of registers, and there is no mention of how many bits the special purpose registers (I suppose these are some) should generically have. What's the point of multiplying two 64-bit numbers, throwing away the top 64 bits, and storing or accumulating the bottom 64 bits as two 32-bit lumps? Or is the MACHI/MACLO notation meant to hedge some bets, so it's just a single "MAC" register in reality? Why are additive overflow exceptions in the accumulator signalled, but nobody takes any notice of whether the multiplication has overflowed or not? It would make more sense to me if multiplication were stored or accumulated into two 64-bit registers, analogous to the 32-bit behavior. Anyway .. I'd be grateful for an indication of the status of these slightly-dubious-looking-to-me 64-bit descriptions. Regards and please keep up the good work! PTB _______________________________________________ OpenRISC mailing list [email protected] http://lists.openrisc.net/listinfo/openrisc
