James Carlson wrote: > Thomas De Schampheleire writes: >> No, I am not designing a CPU. What I am doing is a research project, in >> which I will attempt to implement adaptive shutdown of processors in >> OpenSolaris. I think I will try to use a simple module, which can possibly >> use register_cpu_setup_func() to register a callback upon external cpu >> transitions. > > Ah, ok. I think if I were doing this, I'd just modify one of the > existing CPU modules in ON, rather than trying to create a separate > module that must be loaded very early during boot. > >> However such DR things will not be done in our experimental >> setup, so I think they will not even be necessary (unless to be more >> general). >> >> Do you have any idea whether SPARC processors implement low-power states, >> just like x86 does? Is ACPI also used for this? > > I had thought ACPI was an Intel invention, so I'd expect the answer to > that second question to be "no."
I can definitively answer this question with "no". There is no implementation of ACPI BIOS on SPARC machines, and no ACPI services are provided by Solaris on SPARC platforms. Power control for UltraSPARC CPUs is provided by a CPU-specific device driver (see below). Note that even when ACPI services are available on x86 systems, most of the CPU power control is done by CPU-specific code in device drivers (examples: Enhanced SpeedStep, PowerNow). > As for the first question, I'm no SPARC CPU expert. You'll probably > want to hit the SPARC databooks for that. (My guess would be that it > has its own power-management architecture, and that the existing code > already supports those functions. This sort of thing was done long > ago, before x86 ...) While I'm not a SPARC CPU expert as well, I can tell you that some models of UltraSPARC CPUs do implement clock-rate reduction. This is controlled by code in usr/src/uts/sun4u/io/us_drv.c (see this link: http://src.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/uts/sun4u/io/us_drv.c) The existing Solaris power management framework operates by reducing power states after a given period of idleness, configured by power.conf(4). It's a fairly slow-acting scheme for CPU power reduction, unlike typical x86 schemes which rapidly change power-state up and down. Cheers, Dana _______________________________________________ opensolaris-code mailing list [email protected] http://mail.opensolaris.org/mailman/listinfo/opensolaris-code
