On Nov 21, 2007 9:08 PM, Gavin Maltby <[EMAIL PROTECTED]> wrote:
> Hi,
>
> Mladen Nikitovic wrote:
> > Hi,
> >
> > I've been informed that there is a "power-aware" version of the original 
> > idle-thread in OpenSolaris. My understanding is that this version should 
> > execute the halt-instruction, which in turn disables the clock-tree of the 
> > processor. In the original version, the idle-thread continues checking 
> > different queues etc.
> >
> > As the power-aware idle-thread is not used by default, I'm wondering how I 
> > can go about replacing the original idle-thread? Is there a smooth 
> > approach? Would be happy for any pointers...At this point I'm not exactly 
> > aware of where the code for the power-aware idle thread is located in the 
> > source-tree.
>
> The common idle loop is idle() in uts/common/disp/disp.c.  Have a look
> at its source and you'll see it calls the function pointed to by
> idle_cpu when it can find no work to do.  The uniprocessor loop
> is easier to follows:
>
>         while (ncpus == 1) {
>                 if (cp->cpu_disp->disp_nrunnable == 0) {
>                         (*idle_cpu)();
>                         continue;
>                 }
>                 idle_exit();
>                 swtch();
>
>                 idle_enter(); /* returned from swtch */
>         }
>
> Different architectures can assign custom idle function to
> idle_cpu.  The default is generic_idle_cpu (see definition
> of idle_cpu pointer in disp.c).  For i86pc it can be
> set to cpu_idle or to cpu_idle_mwait.
>
> cpu_idle calls mach_cpu_idle which for i86pc calls the
> halt instruction you refer to.
>
> cpu_idle_mwait is a variant on systems that support monitoring
> a line of memory for their wakeup condition (halt support
> above uses an interrupt).

depends on the macro "__xpv", if it's defined, cpu_idle_mwait is used.

>
> These are basic power awareness aspects - no frequency scaling, voltage
> change etc.

depends on if C1E is supported. If it is, frequency and voltage are turned down.

>There is now support for Intel Speedstep.  I've lost
> track of the story for AMD - I know we decided it can't be
> done on multiprocessor systems before family 0x10, but I vaguely
> recall an intention to try it for family 0xf for single-socket
> systems.
>
-Aubrey
Intel OpenSolaris Team.
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