> 
> 
> 
> I pointed you to the SPARC variants of inline
> assembly (lda ASI_PL).
> 
> (Or did my post not come through).
> 
> No need for shifts.

Would you please explain how

lduwa   [%o0]0x88, %o0

works? What does the load instruction "lduwa" do? And most importantly, does 
that mean that the load instructions on (Ultra)SPARC processors are faster than 
shifts?

Is there an instruction clock-cycle table anywhere?
 
 
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