> Dennis Clarke wrote:
>>> Dennis Clarke wrote:
>>>
>>>> This seems to be an opportunity to employ some code early in the boot
>>>> phase
>>>> and to perhaps print out some debugging info at that time.
>>>>
>>>> The question is .. where and what to debug.
>>>>
>>>>
>>> Can you send me the output of:
>>>
>>> # echo "cpuid_info0::print" | mdb -k
>>>
>>
>> # echo "cpuid_info0::print" | mdb -k
>> {
>> cpi_pass = 0x4
>> cpi_maxeax = 0x1
>> cpi_vendorstr = [ "CentaurHauls" ]
>> cpi_vendor = 0x6
>> cpi_family = 0x6
>> cpi_model = 0xa
>> cpi_step = 0x9
>> cpi_chipid = 0xffffffff
>> cpi_brandid = 0
>> cpi_clogid = 0
>> cpi_ncpu_per_chip = 0x1
>> cpi_cacheinfo = [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ]
>> cpi_ncache = 0
>> cpi_std = [
>> {
>> cp_eax = 0x1
>> cp_ebx = 0x746e6543
>> cp_ecx = 0x736c7561
>> cp_edx = 0x48727561
>> }
>> {
>> cp_eax = 0x6a9
>> cp_ebx = 0x10800
>> cp_ecx = 0
>> cp_edx = 0xa7c9bbff
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> ]
>> cpi_xmaxeax = 0x80000006
>> cpi_brandstr = [ "VIA Esther processor 1200MHz" ]
>> cpi_pabits = 0x24
>> cpi_vabits = 0x20
>> cpi_extd = [
>> {
>> cp_eax = 0x80000006
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0x20202020
>> cp_ebx = 0x20202020
>> cp_ecx = 0x20202020
>> cp_edx = 0x20202020
>> }
>> {
>> cp_eax = 0x56202020
>> cp_ebx = 0x45204149
>> cp_ecx = 0x65687473
>> cp_edx = 0x72702072
>> }
>> {
>> cp_eax = 0x7365636f
>> cp_ebx = 0x20726f73
>> cp_ecx = 0x30303231
>> cp_edx = 0x7a484d
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0x8800880
>> cp_ecx = 0x40040140
>> cp_edx = 0x40040140
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0x80a140
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> {
>> cp_eax = 0
>> cp_ebx = 0
>> cp_ecx = 0
>> cp_edx = 0
>> }
>> ]
>> cpi_coreid = 0
>> cpi_ncore_per_chip = 0x1
>> cpi_support = [ 0xa7c9bbff, 0, 0, 0, 0 ]
>> cpi_chiprev = 0
>> cpi_chiprevstr = 0xfe8a6a80 "Unknown"
>> cpi_socket = 0
>> cpi_mwait = {
>> mon_min = 0
>> mon_max = 0
>> support = 0
>> }
>> }
>>
>>
>>> Those are the tea leaves that i'll be using the VIA CPUID guide to
>>> interpret. :)
>>>
>>
>> let me know anything else that you need.
> Thanks, I can see from cpuid_info0.cpi_extd[6].cp_ecx[15:12] where the
> associativity was
> derived from (0xa), so we were assuming an AMD style cache description
> (amd_l2cacheinfo()). cpuid_info.cpi_std[2] is filled with 0x20
> descriptors...for which we don't have an entry in our
> tables. If the appropriate CPUID reference says we should be using
> function 2, then that's probably the problem.
gee ... I'll just agree ;-)
> I've filed:
> 6580117 panic: assertion failed: ISP2(CPUSETSIZE()) on VIA Esther
> based system
> for this.
>
> Thanks,
> -Eric
>
Thank you .. I'll keep an eye on this link :
http://bugs.opensolaris.org/bugdatabase/view_bug.do?bug_id=6580117
and in the meantime I'll update my code via hg and fire off another build
just to test the results. When you're ready.
anything else you need .. just let me know.
Dennis Clarke
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