On Thu, 15 Nov 2007, Ajay Ramesh wrote:
I want to design folowing SAM in solaris please some body help me
My memory tells me that is a repeat request ...
Anyway, OpenSolaris is a software project. CPU design isn't exactly what
people here focus on, and/or have great expertise in...
It might be a better idea to inquire about such things with our friends
over at http://www.opensparc.net - that would help you more.
By the way, there's a huge amount of samples (both circuit diagrams and
VHDL code) for various processor subsystems out on the Web.
Even wikipedia's cpu design / alu design webpages provide such links.
Likely, noone will take your task of integrating various subpieces (that
you might find pre-cooked) into the coherent whole that the project below
asks for. There's a little bit of homework involved for every student :)
FrankH.
2. Design of a 16 bit Processor:
Assume the design includes a Program Counter, Accumulator, Arithmetic Logic
Unit and Instruction Register. Let “addr” denote the address (field) and “mem
[addr]” denotes contents of memory location “addr”.
Note 1: The Memory is external to the Processor
Note 2: Assume memory is 4K by 16 bits
A. Design an Instruction Set to do the following:
1. Load Accumulator from memory location “addr”
2. Store Contents of Accumulator to memory location ‘addr”
3. Add the Contents of Accumulator and memory location “addr” and store in
Accumulator
4. Subtract the Contents of memory location “addr” from Accumulator and
store in Accumulator
The instruction set reference manual for the Z80, M6502, or i8008 will
provide examples for that.
5. Load the Program Counter from memory location “addr”
6. Set the Accumulator to “addr” if accumulator >= zero
7. Set the Accumulator to “addr” if accumulator not equal to zero
8. Stop the Processor
B. Write the Block Diagram of the Data path for the Processor
Note: This must include the Address Bus, Data Bus, ALU, PC, ACC, IR and
external memory.
Question: What is the size of the Address Bus?
Question: What is the size of the Data Bus?
Questions: What are the Control Signals?
C. ALU Design:
1. The ALU functions are : A+B, A-B, A+1, B+1, B, Clear
2. Design the ALU in Verilog/VHDL/C
3. Write a Testbench and Verify that the ALU works properly.
Notes: Simulate with a standard Simulator such as ModelTech ModelSim
Assume 2s complement arithmetic – why do this?
D. Write the Register Transfer Level Organization of the Processor
1. Write a Block Diagram of the Processor at the Register Level
2. Write the Verilog/VHDL/JHDL register level code
3. Write the Testbench for the Processor – how will it initialize?
4. Simulate with a standard Simulator such as Model Tech ModelSim
E. Extensions to the 16 bit Processor
1. How many op-codes are there in the Processor now?
2. How many can be added without much change?
3. Write down some suitable opcodes and the corresponding operands
4. Iterate on the procedures described above to verify functionality
5. Extend the Address Space
6. Add more addressing modes
7. For Subroutine calls, add the capability to save the PC
8. Add more Registers
9. Add support for Interrupts
10. Add support for a Condition Code register
3. Pipelining:
3 stage pipelining
5 stage pipelining
(to be expanded further)
4. Level 1 Cache design:
Different types of Caches: Direct, Set Associative, etc
Design of a cache
Cache Simulation
Cost of Cache vs. Simple RAM organization
Measurement of Cache Performance
Incorporate Cache design into your Processor Design
Must be able to turn Cache on or off
Measure the performance with and without Cache enabled
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