The branch master has been updated
via a93d3e06a9849deeceadf1b51c10492ae77c43eb (commit)
via 5e5ece561d1f7e557c8e0ea202a8c1f3008361ce (commit)
from 11208dcfb9105e8afa37233185decefd45e89e17 (commit)
- Log -----------------------------------------------------------------
commit a93d3e06a9849deeceadf1b51c10492ae77c43eb
Author: Andy Polyakov <[email protected]>
Date: Wed Sep 23 16:43:55 2015 +0200
Configurations: add linux-arm64ilp32 target.
Reviewed-by: Tim Hudson <[email protected]>
commit 5e5ece561d1f7e557c8e0ea202a8c1f3008361ce
Author: Andy Polyakov <[email protected]>
Date: Mon Sep 21 16:44:37 2015 +0200
Allow ILP32 compilation in AArch64 assembly pack.
Reviewed-by: Tim Hudson <[email protected]>
-----------------------------------------------------------------------
Summary of changes:
Configurations/10-main.conf | 7 +++++++
crypto/sha/asm/sha1-armv8.pl | 8 ++++++++
crypto/sha/asm/sha512-armv8.pl | 8 ++++++++
3 files changed, 23 insertions(+)
diff --git a/Configurations/10-main.conf b/Configurations/10-main.conf
index 3230d86..e612812 100644
--- a/Configurations/10-main.conf
+++ b/Configurations/10-main.conf
@@ -582,6 +582,13 @@
inherit_from => [ "linux-generic64", asm("aarch64_asm") ],
perlasm_scheme => "linux64",
},
+ "linux-arm64ilp32" => { # https://wiki.linaro.org/Platform/arm64-ilp32
+ inherit_from => [ "linux-generic32", asm("aarch64_asm") ],
+ cflags => "-mabi=ilp32 -Wall"
+ bn_ops => "SIXTY_FOUR_BIT RC4_CHAR RC4_CHUNK DES_INT
DES_UNROLL BF_PTR",
+ perlasm_scheme => "linux64",
+ shared_ldflag => "-mabi=ilp32",
+ },
"linux-mips32" => {
# Configure script adds minimally required -march for assembly
diff --git a/crypto/sha/asm/sha1-armv8.pl b/crypto/sha/asm/sha1-armv8.pl
index a8c08c2..5ef9dc2 100644
--- a/crypto/sha/asm/sha1-armv8.pl
+++ b/crypto/sha/asm/sha1-armv8.pl
@@ -171,7 +171,11 @@ $code.=<<___;
.type sha1_block_data_order,%function
.align 6
sha1_block_data_order:
+#ifdef __ILP32__
+ ldrsw x16,.LOPENSSL_armcap_P
+#else
ldr x16,.LOPENSSL_armcap_P
+#endif
adr x17,.LOPENSSL_armcap_P
add x16,x16,x17
ldr w16,[x16]
@@ -309,7 +313,11 @@ $code.=<<___;
.long 0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc //K_40_59
.long 0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6 //K_60_79
.LOPENSSL_armcap_P:
+#ifdef __ILP32__
+.long OPENSSL_armcap_P-.
+#else
.quad OPENSSL_armcap_P-.
+#endif
.asciz "SHA1 block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
.align 2
.comm OPENSSL_armcap_P,4,4
diff --git a/crypto/sha/asm/sha512-armv8.pl b/crypto/sha/asm/sha512-armv8.pl
index d009f3f..7d69f0f 100644
--- a/crypto/sha/asm/sha512-armv8.pl
+++ b/crypto/sha/asm/sha512-armv8.pl
@@ -169,7 +169,11 @@ $code.=<<___;
$func:
___
$code.=<<___ if ($SZ==4);
+#ifdef __ILP32__
+ ldrsw x16,.LOPENSSL_armcap_P
+#else
ldr x16,.LOPENSSL_armcap_P
+#endif
adr x17,.LOPENSSL_armcap_P
add x16,x16,x17
ldr w16,[x16]
@@ -311,7 +315,11 @@ $code.=<<___;
.size .LK$BITS,.-.LK$BITS
.align 3
.LOPENSSL_armcap_P:
+#ifdef __ILP32__
+ .long OPENSSL_armcap_P-.
+#else
.quad OPENSSL_armcap_P-.
+#endif
.asciz "SHA$BITS block transform for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
.align 2
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