The branch master has been updated
via 1ea01427c5195dafa4f00202237c5b7a389f034b (commit)
via 526ab896459a58748af198f6703108b79c917f08 (commit)
via 569204be9095e6c706d887dd0359ca6e309db026 (commit)
from 2b40699082d1e5d0e94811542c4f0633ab2d5989 (commit)
- Log -----------------------------------------------------------------
commit 1ea01427c5195dafa4f00202237c5b7a389f034b
Author: Andy Polyakov <[email protected]>
Date: Wed Dec 14 13:38:04 2016 +0100
poly1305/asm/poly1305-x86_64.pl: allow nasm to assemble AVX512 code.
chacha/asm/chacha-x86_64.pl: refine nasm version detection logic.
Reviewed-by: Richard Levitte <[email protected]>
commit 526ab896459a58748af198f6703108b79c917f08
Author: Andy Polyakov <[email protected]>
Date: Wed Dec 14 13:34:47 2016 +0100
perlasm/x86_64-xlate.pl: add support for AVX512 OPMASK-ing.
Reviewed-by: Richard Levitte <[email protected]>
commit 569204be9095e6c706d887dd0359ca6e309db026
Author: Andy Polyakov <[email protected]>
Date: Wed Dec 14 13:33:40 2016 +0100
man3/OPENSSL_ia32cap.pod: clarify AVX512 support in clang context.
Reviewed-by: Richard Levitte <[email protected]>
-----------------------------------------------------------------------
Summary of changes:
crypto/chacha/asm/chacha-x86_64.pl | 2 +-
crypto/perlasm/x86_64-xlate.pl | 36 ++++++++++++++++++++++------------
crypto/poly1305/asm/poly1305-x86_64.pl | 5 +++--
doc/man3/OPENSSL_ia32cap.pod | 21 +++++++++++++++++++-
4 files changed, 47 insertions(+), 17 deletions(-)
diff --git a/crypto/chacha/asm/chacha-x86_64.pl
b/crypto/chacha/asm/chacha-x86_64.pl
index 7153d82..a32d3dc 100755
--- a/crypto/chacha/asm/chacha-x86_64.pl
+++ b/crypto/chacha/asm/chacha-x86_64.pl
@@ -66,7 +66,7 @@ if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null
2>&1`
}
if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
- `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
+ `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
$avx = ($1>=2.09) + ($1>=2.10) + ($1>=2.12);
$avx += 1 if ($1==2.11 && $2>=8);
}
diff --git a/crypto/perlasm/x86_64-xlate.pl b/crypto/perlasm/x86_64-xlate.pl
index 4298b3f..1ae2442 100755
--- a/crypto/perlasm/x86_64-xlate.pl
+++ b/crypto/perlasm/x86_64-xlate.pl
@@ -130,7 +130,7 @@ my %globals;
$self->{sz} = "";
} elsif ($self->{op} =~ /^p/ && $' !~ /^(ush|op|insrw)/) { # SSEn
$self->{sz} = "";
- } elsif ($self->{op} =~ /^v/) { # VEX
+ } elsif ($self->{op} =~ /^[vk]/) { # VEX or k* such as kmov
$self->{sz} = "";
} elsif ($self->{op} =~ /mov[dq]/ && $$line =~ /%xmm/) {
$self->{sz} = "";
@@ -229,12 +229,13 @@ my %globals;
my $ret;
# optional * ----vvv--- appears in indirect jmp/call
- if ($$line =~ /^(\*?)([^\(,]*)\(([%\w,]+)\)/) {
+ if ($$line =~ /^(\*?)([^\(,]*)\(([%\w,]+)\)((?:{[^}]+})*)/) {
bless $self, $class;
$self->{asterisk} = $1;
$self->{label} = $2;
($self->{base},$self->{index},$self->{scale})=split(/,/,$3);
$self->{scale} = 1 if (!defined($self->{scale}));
+ $self->{pred} = $4;
$ret = $self;
$$line = substr($$line,@+[0]); $$line =~ s/^\s+//;
@@ -284,12 +285,14 @@ my %globals;
$self->{label} =~ s/^___imp_/__imp__/ if ($flavour eq "mingw64");
if (defined($self->{index})) {
- sprintf "%s%s(%s,%%%s,%d)",$self->{asterisk},
- $self->{label},
+ sprintf "%s%s(%s,%%%s,%d)%s",
+ $self->{asterisk},$self->{label},
$self->{base}?"%$self->{base}":"",
- $self->{index},$self->{scale};
+ $self->{index},$self->{scale},
+ $self->{pred};
} else {
- sprintf "%s%s(%%%s)",
$self->{asterisk},$self->{label},$self->{base};
+ sprintf "%s%s(%%%s)%s", $self->{asterisk},$self->{label},
+ $self->{base},$self->{pred};
}
} else {
my %szmap = ( b=>"BYTE$PTR", w=>"WORD$PTR",
@@ -308,17 +311,20 @@ my %globals;
($mnemonic =~ /^vpbroadcast([qdwb])$/) && ($sz=$1) ||
($mnemonic =~ /^v(?!perm)[a-z]+[fi]128$/) && ($sz="x");
+ $self->{pred} =~ s/%(k[0-7])/$1/;
+
if (defined($self->{index})) {
- sprintf "%s[%s%s*%d%s]",$szmap{$sz},
+ sprintf "%s[%s%s*%d%s]%s",$szmap{$sz},
$self->{label}?"$self->{label}+":"",
$self->{index},$self->{scale},
- $self->{base}?"+$self->{base}":"";
+ $self->{base}?"+$self->{base}":"",
+ $self->{pred};
} elsif ($self->{base} eq "rip") {
sprintf "%s[%s]",$szmap{$sz},$self->{label};
} else {
- sprintf "%s[%s%s]",$szmap{$sz},
+ sprintf "%s[%s%s]%s", $szmap{$sz},
$self->{label}?"$self->{label}+":"",
- $self->{base};
+ $self->{base},$self->{pred};
}
}
}
@@ -330,10 +336,11 @@ my %globals;
my $ret;
# optional * ----vvv--- appears in indirect jmp/call
- if ($$line =~ /^(\*?)%(\w+)/) {
+ if ($$line =~ /^(\*?)%(\w+)((?:{[^}]+})*)/) {
bless $self,$class;
$self->{asterisk} = $1;
$self->{value} = $2;
+ $self->{pred} = $3;
$opcode->size($self->size());
$ret = $self;
$$line = substr($$line,@+[0]); $$line =~ s/^\s+//;
@@ -357,8 +364,11 @@ my %globals;
}
sub out {
my $self = shift;
- if ($gas) { sprintf "%s%%%s",$self->{asterisk},$self->{value}; }
- else { $self->{value}; }
+ if ($gas) { sprintf "%s%%%s%s", $self->{asterisk},
+ $self->{value},
+ $self->{pred}; }
+ else { $self->{pred} =~ s/%(k[0-7])/$1/;
+ $self->{value}.$self->{pred}; }
}
}
{ package label; # pick up labels, which end with :
diff --git a/crypto/poly1305/asm/poly1305-x86_64.pl
b/crypto/poly1305/asm/poly1305-x86_64.pl
index 2c9982c..baf3c75 100755
--- a/crypto/poly1305/asm/poly1305-x86_64.pl
+++ b/crypto/poly1305/asm/poly1305-x86_64.pl
@@ -66,8 +66,9 @@ if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null
2>&1`
}
if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
- `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
- $avx = ($1>=2.09) + ($1>=2.10);
+ `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)(?:\.([0-9]+))?/) {
+ $avx = ($1>=2.09) + ($1>=2.10) + ($1>=2.12);
+ $avx += 1 if ($1==2.11 && $2>=8);
}
if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
diff --git a/doc/man3/OPENSSL_ia32cap.pod b/doc/man3/OPENSSL_ia32cap.pod
index 60dd964..5071659 100644
--- a/doc/man3/OPENSSL_ia32cap.pod
+++ b/doc/man3/OPENSSL_ia32cap.pod
@@ -101,6 +101,9 @@ and RORX;
=item bit #64+19 denoting availability of ADCX and ADOX instructions;
+=item bit #64+21 denoting availability of VPMADD52[LH]UQ instructions,
+a.k.a. AVX512IFMA extension;
+
=item bit #64+29 denoting availability of SHA extension;
=item bit #64+30 denoting availability of AVX512BW extension;
@@ -125,7 +128,23 @@ requirements are summarized in below table:
AVX | 2.19 | 2.09 | 3.0
AVX2 | 2.22 | 2.10 | 3.1
ADCX/ADOX | 2.23 | 2.10 | 3.3
- AVX512 | 2.25 | 2.11.8 | 3.6
+ AVX512 | 2.25 | 2.11.8 | see NOTES
+ AVX512IFMA | 2.26 | 2.11.8 | see NOTES
+
+=head1 NOTES
+
+Even though AVX512 support was implemented in llvm 3.6, compilation of
+assembly modules apparently requires explicit -march flag. But then
+compiler generates processor-specific code, which in turn contradicts
+the mere idea of run-time switch execution facilitated by the variable
+in question. Till the limitation is lifted, it's possible to work around
+the problem by making build procedure use following script:
+
+ #!/bin/sh
+ exec clang -no-integrated-as "$@"
+
+instead of real clang. In which case it doesn't matter which clang
+version is used, as it is GNU assembler version that will be checked.
=head1 COPYRIGHT
_____
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