The branch master has been updated
via 66bee01c822c5dd26679cad076c52b3d81199668 (commit)
from 02cba628daa7fea959c561531a8a984756bdf41c (commit)
- Log -----------------------------------------------------------------
commit 66bee01c822c5dd26679cad076c52b3d81199668
Author: Andy Polyakov <[email protected]>
Date: Fri Jan 27 19:03:37 2017 +0100
crypto/x86_64cpuid.pl: detect if kernel preserves %zmm registers.
Reviewed-by: Rich Salz <[email protected]>
-----------------------------------------------------------------------
Summary of changes:
crypto/x86_64cpuid.pl | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/crypto/x86_64cpuid.pl b/crypto/x86_64cpuid.pl
index 6cb1521..3082253 100644
--- a/crypto/x86_64cpuid.pl
+++ b/crypto/x86_64cpuid.pl
@@ -175,13 +175,21 @@ OPENSSL_ia32_cpuid:
jnc .Lclear_avx
xor %ecx,%ecx # XCR0
.byte 0x0f,0x01,0xd0 # xgetbv
+ and \$0xe6,%eax # isolate XMM, YMM and ZMM state support
+ cmp \$0xe6,%eax
+ je .Ldone
+ andl \$0xfffeffff,8(%rdi) # clear AVX512F, ~(1<<16)
+ # note that we don't touch other AVX512
+ # extensions, because they can be used
+ # with YMM (without opmasking though)
and \$6,%eax # isolate XMM and YMM state support
cmp \$6,%eax
je .Ldone
.Lclear_avx:
mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
and %eax,%r9d # clear AVX, FMA and AMD XOP bits
- andl \$0xffffffdf,8(%rdi) # cleax AVX2, ~(1<<5)
+ mov \$0x3fdeffdf,%eax # ~(1<<31|1<<30|1<<21|1<<16|1<<5)
+ and %eax,8(%rdi) # cleax AVX2 and AVX512* bits
.Ldone:
shl \$32,%r9
mov %r10d,%eax
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