Branch: refs/heads/OpenSSL_1_1_1-stable
Home: https://github.openssl.org/openssl/openssl
Commit: a8f6d73fda64d514171e99a50d1483c0c0b8d968
https://github.openssl.org/openssl/openssl/commit/a8f6d73fda64d514171e99a50d1483c0c0b8d968
Author: Bernd Edlinger <[email protected]>
Date: 2022-07-06 (Wed, 06 Jul 2022)
Changed paths:
M crypto/aes/asm/aesv8-armx.pl
Log Message:
-----------
Fix reported performance degradation on aarch64
This restores the implementation prior to
commit 2621751 ("aes/asm/aesv8-armx.pl: avoid 32-bit lane assignment in CTR
mode")
for 64bit targets only, since it is reportedly 2-17% slower,
and the silicon errata only affects 32bit targets.
Only for 32bit targets the new algorithm is used.
Fixes #18445
Reviewed-by: Tomas Mraz <[email protected]>
Reviewed-by: Paul Dale <[email protected]>
Reviewed-by: Hugo Landau <[email protected]>
(Merged from https://github.com/openssl/openssl/pull/18539)
