Here's a small patch to crypto/sha/asm/sha512-586.pl.
My assemblers (ml & nasm) correctly complains on lines like:
./tmp32/sha512-586.S:515: error: mismatch in operand sizes
which is:
movq mm4,DWORD PTR 24[esp]
In fact it must be:
movq mm4,QWORD PTR 24[esp]
Hence with this small patch, it works:
--- openssl-SNAP-20130709\crypto\sha\asm\sha512-586.pl 2013-06-10 21:00:03
+0000
+++ crypto\sha\asm\sha512-586.pl 2013-07-09 07:17:44 +0000
@@ -533,7 +533,7 @@
'&psllq($E,4)',
'&pxor ("mm3",$E)', # T1=Sigma1_512(e)
- '&movq ($E,&DWP(8*($i+3)%64,"esp"))', # e = load d, e in next
round
+ '&movq ($E,&QWP(8*($i+3)%64,"esp"))', # e = load d, e in next
round
'&paddq ("mm3","mm7")', # T1+=X[i]
'&movq ("mm5",$A)', # %mm5 is sliding right
'&psrlq("mm5",28)',
---------
(the MMX-registers are 64-bit. Hence the QWORD).
--gv
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