> openssl 0.9.4's Configure defines L_ENDIAN for ultrix-cc and ultrix-gcc.
> A DECStation however has a MIPS (R3XX, R400) CPU, which to the best of my
> knowledge is big endian.
Those MIPS CPUs are capable of running in either little- or big-endian
byte order. Endianness is chosen (somehow) during early initialization
and can not be arbitrarily changed/chosen as in some modern CPUs. DEC
has (naturally) chosen to initialize 'em in little-endian mode.
> I'm not sure about VAX,
VAX and even Alpha CPUs are little-endian only. Do you see the pattern?
*All* DEC boxes are little-endian.
Andy.
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