Andy Polyakov wrote:
| 
| Another thing to consider in the same line of minimal assumption. 
| Explicitly "prototype" mnemonics, e.g. not xor %rax,%rax, but xorq 
| %rax,%rax. Yes, GNU assembler works with "unprototyped" mnemonics, but 
| Solaris assembler is known to be allergic to them. Well, we haven't seen 
| Solaris x86_64 assembler yet, but it's plausible to assume that it won't 
| be any different in this respect from x86.

Thanks for the advice.

| Another unwritten rule is don't get fixated on particular 
| u-architecture, Opteron in this case. Consider other implementations 
| too, EM64T in this case. Favor *all-round* performance!

Actually, I optimize only for the AMD microarch, because I don't have
Intel hardware in my hands.

| >Ok. So, here is my question to the OpenSSL community: what algorithm
| >would you like to see optimized for AMD64 ? AES, SHA-1, Blowfish, RC5 ?
| 
| I might have an opportunity to play with AES some day this year... 
| Blowfish is perfectly comfortable in tiny IA-32 register bank and 
| compiler-generated code was observed to be as fast as assembler 
| implementation on x86. Meaning that it will be even more comfortable in 
| x86_64 register bank and compiler has all chances to do decent job.
| Who uses RC5? A.

Okay, so:

SHA-1: Dean already worked on this, using SSE2.
RSA: The compiler already does a good job with 64-bit arithmetic.
Blowfish: Not used as much as AES.
RC5: Not very popular.

I think I am going to stick with one the algorithm proposed by Steve
and Peter: AES.

My first step will be to study the only existing AMD64 implementation of
AES: loop-aes, merged in Linux kernel 2.6.8-rc3 by Brian Gladman.

-- 
Marc Bevand                              http://epita.fr/~bevand_m
Computer Science School EPITA - System, Network and Security Dept.
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