On Thursday 2010-07-01 11:31, Andy Polyakov wrote: >>>>> SIGBUS normally denotes unaligned access, but instruction in qustion >>>>> pulls 16-bit value and effective address is 16-bit aligned... >> >> I just tried a test .S file with >> >> ldda [%sp+0+16]%asi, %f0 >> ldda [%sp+0+8]%asi, %f0 >> ldda [%sp+0+4]%asi, %f0 >> ldda [%sp+0+2]%asi, %f0 >> >> And +4 is the first one it SIGBUS'd on. So if the alignment in >> sparcv9a-mont is increases to +8, it would also work on T1. > >Yes, but spacv9a-mont *relies* on +2, +4 and even +6. Offsets are used >to pick 16-bit words constituting single [naturally aligned] 64-bit
Hm. If I read the SPARC quick reference at http://docs.sun.com/app/docs/doc/816-1681/sparcv9-15322?a=view right, ldd(a) loads a floating point word rather than a 16-bit word, which would explain why it declines non-8 aligned addresses. >value, i.e. words reside on adjacent +2n offsets [with n=0-3]. It does >work on UltraSPARC-I-IV and SPARC64 V-VII. ______________________________________________________________________ OpenSSL Project http://www.openssl.org Development Mailing List openssl-dev@openssl.org Automated List Manager majord...@openssl.org
