>From my mind, when you use an FPGA encryption hardware, CPU needs to dump one >block data into the FPAG and read the result out. This is the time CPU spends >for the encryption of one block data when the FPGA hardware is used. You need >to compare this time with the time you spend by doing the encryption work of >one block data by CPU itself in software. This is highly depend of the block >size and in which way CPU communicates with the FPGA to exchange the data.
-----Original Message----- From: owner-openssl-us...@openssl.org [mailto:owner-openssl-us...@openssl.org] On Behalf Of Mark H. Wood Sent: Thursday, March 11, 2010 6:08 AM To: openssl-users@openssl.org Subject: Re: CPU usage and FPGA support Notice a few things: o The OP asked about reducing CPU load, but the answers all talk about making encryption faster. These are not the same thing. Offloading encryption might *reduce* throughput of the encrypted streams, and yet free up CPU time to do other things. Encrypted communication might not be the highest priority task in the system, and there might not be much of it to do per unit time. o This is a student project. The objective is to learn something specific about the design of digital systems, not (necessarily) to maximize throughput. The requirements don't have to make practical sense, so long as they make educational sense. Anyway, when did anyone pass a law that says requirements have to be sensible? :-) -- Mark H. Wood, Lead System Programmer mw...@iupui.edu Friends don't let friends publish revisable-form documents. ______________________________________________________________________ OpenSSL Project http://www.openssl.org User Support Mailing List openssl-users@openssl.org Automated List Manager majord...@openssl.org
