Hello community,

here is the log from the commit of package valgrind for openSUSE:Factory
checked in at Mon Jun 20 09:31:14 CEST 2011.



--------
--- valgrind/valgrind.changes   2011-05-17 13:48:54.000000000 +0200
+++ /mounts/work_src_done/STABLE/valgrind/valgrind.changes      2011-06-18 
19:10:38.000000000 +0200
@@ -1,0 +2,5 @@
+Sat Jun 18 17:09:08 UTC 2011 - dmuel...@suse.de
+
+- Improve Valgrind POWER6 and POWER7/P7 support (bnc#700358)
+
+-------------------------------------------------------------------

calling whatdependson for head-i586


New:
----
  vg_bug259977_r11687.patch
  vg_bug259977_r11688.patch
  vg_bug259977_r11689.patch
  vg_bug259977_r11690.patch
  vg_bug267630_r2127.patch
  vg_bug270794_r11697.patch
  vg_bug270851_r2130.patch
  vg_bug270851_r2148.patch
  vg_bug270856_r2136.patch
  vg_bug271042_r11699.patch
  vg_bug271043_r11700.patch
  vg_bug271043_r11765.patch

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ valgrind.spec ++++++
--- /var/tmp/diff_new_pack.Xe3nlS/_old  2011-06-20 09:27:32.000000000 +0200
+++ /var/tmp/diff_new_pack.Xe3nlS/_new  2011-06-20 09:27:32.000000000 +0200
@@ -28,7 +28,7 @@
 Summary:        Memory Management Debugger
 BuildRoot:      %{_tmppath}/%{name}-%{version}-build
 Version:        3.6.1
-Release:        2
+Release:        5
 Source0:        %{name}-%{version}.tar.bz2
 # svn  di svn://svn.valgrind.org/valgrind/tags/VALGRIND_3_5_0 
svn://svn.valgrind.org/valgrind/branches/VALGRIND_3_5_BRANCH > 3_5_BRANCH.diff
 # svn  di svn://svn.valgrind.org/vex/tags/VEX_3_5_0 
svn://svn.valgrind.org/vex/branches/VEX_3_5_BRANCH > VEX_3_5_BRANCH.diff
@@ -38,6 +38,19 @@
 Patch6:         valgrind-r11644.diff
 Patch7:         valgrind-r11643.diff
 Patch8:         valgrind-vex-r2106.diff
+Patch9:         vg_bug259977_r11687.patch
+Patch10:        vg_bug259977_r11688.patch
+Patch11:        vg_bug259977_r11689.patch
+Patch12:        vg_bug259977_r11690.patch
+Patch14:        vg_bug270794_r11697.patch
+Patch15:        vg_bug271042_r11699.patch
+Patch16:        vg_bug271043_r11700.patch
+Patch17:        vg_bug271043_r11765.patch
+
+Patch41:        vg_bug267630_r2127.patch
+Patch42:        vg_bug270851_r2130.patch
+Patch43:        vg_bug270856_r2136.patch
+Patch44:        vg_bug270851_r2148.patch
 %if %suse_version <= 1100
 Provides:       valgrind-devel = %version
 %endif
@@ -138,6 +151,19 @@
 #%endif
 %patch6
 %patch7
+%patch9
+%patch10
+%patch11
+%patch12
+%patch14
+%patch15
+%patch16
+%patch17
+
+%patch41
+%patch42
+%patch43
+%patch44
 
 %build
 export CFLAGS="$RPM_OPT_FLAGS"

++++++ jit-register-unregister.diff ++++++
--- /var/tmp/diff_new_pack.Xe3nlS/_old  2011-06-20 09:27:32.000000000 +0200
+++ /var/tmp/diff_new_pack.Xe3nlS/_new  2011-06-20 09:27:32.000000000 +0200
@@ -1,6 +1,8 @@
---- include/valgrind.h
+Index: include/valgrind.h
+===================================================================
+--- include/valgrind.h.orig
 +++ include/valgrind.h
-@@ -4306,7 +4306,12 @@ typedef
+@@ -4328,7 +4328,12 @@ typedef
            VG_USERREQ__LOAD_PDB_DEBUGINFO = 0x1601,
  
            /* Querying of debug info. */
@@ -14,7 +16,7 @@
     } Vg_ClientRequest;
  
  #if !defined(__GNUC__)
-@@ -4758,6 +4763,19 @@ VALGRIND_PRINTF_BACKTRACE(const char *fo
+@@ -4780,6 +4785,19 @@ VALGRIND_PRINTF_BACKTRACE(const char *fo
                                 addr, buf64, 0, 0, 0);             \
     }
  
@@ -34,7 +36,9 @@
  
  #undef PLAT_x86_linux
  #undef PLAT_amd64_linux
---- coregrind/m_debuginfo/debuginfo.c
+Index: coregrind/m_debuginfo/debuginfo.c
+===================================================================
+--- coregrind/m_debuginfo/debuginfo.c.orig
 +++ coregrind/m_debuginfo/debuginfo.c
 @@ -48,6 +48,7 @@
  #include "pub_core_oset.h"
@@ -198,7 +202,9 @@
  
     VG_(demangle) ( do_cxx_demangling, do_z_demangling,
                     di->symtab[sno].name, buf, nbuf );
---- coregrind/pub_core_debuginfo.h
+Index: coregrind/pub_core_debuginfo.h
+===================================================================
+--- coregrind/pub_core_debuginfo.h.orig
 +++ coregrind/pub_core_debuginfo.h
 @@ -106,6 +106,12 @@ Bool VG_(get_fnname_raw) ( Addr a, Char*
  extern
@@ -213,7 +219,9 @@
  
  /* Use DWARF2/3 CFA information to do one step of stack unwinding.
     D3UnwindRegs holds the current register values, and is
---- coregrind/m_scheduler/scheduler.c
+Index: coregrind/m_scheduler/scheduler.c
+===================================================================
+--- coregrind/m_scheduler/scheduler.c.orig
 +++ coregrind/m_scheduler/scheduler.c
 @@ -1585,6 +1585,16 @@ void do_client_request ( ThreadId tid )
              goto my_default;

++++++ vg_bug259977_r11687.patch ++++++
++++ 918 lines (skipped)

++++++ vg_bug259977_r11688.patch ++++++
Index: memcheck/mc_leakcheck.c
===================================================================
--- memcheck/mc_leakcheck.c     (revision 11687)
+++ memcheck/mc_leakcheck.c     (revision 11688)
@@ -635,7 +635,7 @@
 }
 
 
-static VG_MINIMAL_JMP_BUF memscan_jmpbuf;
+static VG_MINIMAL_JMP_BUF(memscan_jmpbuf);
 
 static
 void scan_all_valid_memory_catcher ( Int sigNo, Addr addr )
Index: include/pub_tool_libcsetjmp.h
===================================================================
--- include/pub_tool_libcsetjmp.h       (revision 11687)
+++ include/pub_tool_libcsetjmp.h       (revision 11688)
@@ -64,10 +64,21 @@
    second function (eg, VG_(minimal_setjmp)) doesn't seem to work for
    whatever reason -- returns via a VG_(minimal_longjmp) go wrong.
 */
-#define VG_MINIMAL_JMP_BUF        jmp_buf
+
+#if defined(VGP_ppc32_linux)
+
+#define VG_MINIMAL_JMP_BUF(_name)        UInt _name [32+1+1]
+Int  VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env));
+void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env));
+
+#else
+
+/* The default implementation. */
+#define VG_MINIMAL_JMP_BUF(_name) jmp_buf _name
 #define VG_MINIMAL_SETJMP(_env)   __builtin_setjmp((_env))
 #define VG_MINIMAL_LONGJMP(_env)  __builtin_longjmp((_env),1)
 
+#endif
 
 #endif   // __PUB_TOOL_LIBCSETJMP_H
 
Index: coregrind/m_libcsetjmp.c
===================================================================
--- coregrind/m_libcsetjmp.c    (revision 11687)
+++ coregrind/m_libcsetjmp.c    (revision 11688)
@@ -36,9 +36,114 @@
 
 /* See include/pub_tool_libcsetjmp.h for background and rationale. */
 
-/* No alternative implementations at present. */
+/* The only alternative implementations are for ppc{32,64}-linux.  See
+   #259977. */
 
+#if defined(VGP_ppc32_linux)
 
+__asm__(
+".text"  "\n"
+""  "\n"
+".global VG_MINIMAL_SETJMP"  "\n"  // r3 = jmp_buf
+"VG_MINIMAL_SETJMP:"  "\n"
+"        stw     0, 0(3)"  "\n"
+"        stw     1, 4(3)"  "\n"
+"        stw     2, 8(3)"  "\n"
+"        stw     3, 12(3)"  "\n"
+"        stw     4, 16(3)"  "\n"
+"        stw     5, 20(3)"  "\n"
+"        stw     6, 24(3)"  "\n"
+"        stw     7, 28(3)"  "\n"
+"        stw     8, 32(3)"  "\n"
+"        stw     9, 36(3)"  "\n"
+"        stw     10, 40(3)"  "\n"
+"        stw     11, 44(3)"  "\n"
+"        stw     12, 48(3)"  "\n"
+"        stw     13, 52(3)"  "\n"
+"        stw     14, 56(3)"  "\n"
+"        stw     15, 60(3)"  "\n"
+"        stw     16, 64(3)"  "\n"
+"        stw     17, 68(3)"  "\n"
+"        stw     18, 72(3)"  "\n"
+"        stw     19, 76(3)"  "\n"
+"        stw     20, 80(3)"  "\n"
+"        stw     21, 84(3)"  "\n"
+"        stw     22, 88(3)"  "\n"
+"        stw     23, 92(3)"  "\n"
+"        stw     24, 96(3)"  "\n"
+"        stw     25, 100(3)"  "\n"
+"        stw     26, 104(3)"  "\n"
+"        stw     27, 108(3)"  "\n"
+"        stw     28, 112(3)"  "\n"
+"        stw     29, 116(3)"  "\n"
+"        stw     30, 120(3)"  "\n"
+"        stw     31, 124(3)"  "\n"
+         // must use a caller-save register here as scratch, hence r4
+"        mflr    4"  "\n"
+"        stw     4, 128(3)"  "\n"
+"        mfcr    4"  "\n"
+"        stw     4, 132(3)"  "\n"
+"        li      3, 0"  "\n"
+"        blr"  "\n"
+""  "\n"
+
+
+".global VG_MINIMAL_LONGJMP"  "\n"
+"VG_MINIMAL_LONGJMP:"  "\n"    // r3 = jmp_buf
+         // do r4 = 1
+         // and park it in the restore slot for r3 (the ret reg)
+"        li      4, 1"  "\n"
+"        stw     4, 12(3)"  "\n"
+         // restore everything except r3
+         // then r3 last of all
+         // then blr
+"        lwz     0, 128(3)"  "\n"
+"        mtlr    0"  "\n"
+"        lwz     0, 132(3)"  "\n"
+"        mtcr    0"  "\n"
+"        lwz     0, 0(3)"  "\n"
+"        lwz     1, 4(3)"  "\n"
+"        lwz     2, 8(3)"  "\n"
+         // r3 is done at the end
+"        lwz     4, 16(3)"  "\n"
+"        lwz     5, 20(3)"  "\n"
+"        lwz     6, 24(3)"  "\n"
+"        lwz     7, 28(3)"  "\n"
+"        lwz     8, 32(3)"  "\n"
+"        lwz     9, 36(3)"  "\n"
+"        lwz     10, 40(3)"  "\n"
+"        lwz     11, 44(3)"  "\n"
+"        lwz     12, 48(3)"  "\n"
+"        lwz     13, 52(3)"  "\n"
+"        lwz     14, 56(3)"  "\n"
+"        lwz     15, 60(3)"  "\n"
+"        lwz     16, 64(3)"  "\n"
+"        lwz     17, 68(3)"  "\n"
+"        lwz     18, 72(3)"  "\n"
+"        lwz     19, 76(3)"  "\n"
+"        lwz     20, 80(3)"  "\n"
+"        lwz     21, 84(3)"  "\n"
+"        lwz     22, 88(3)"  "\n"
+"        lwz     23, 92(3)"  "\n"
+"        lwz     24, 96(3)"  "\n"
+"        lwz     25, 100(3)"  "\n"
+"        lwz     26, 104(3)"  "\n"
+"        lwz     27, 108(3)"  "\n"
+"        lwz     28, 112(3)"  "\n"
+"        lwz     29, 116(3)"  "\n"
+"        lwz     30, 120(3)"  "\n"
+"        lwz     31, 124(3)"  "\n"
+"        lwz     3, 12(3)"  "\n"
+"        blr"  "\n"
+""  "\n"
+
+
+".previous"  "\n"
+);
+
+#endif /* VGP_ppc32_linux */
+
+
 /*--------------------------------------------------------------------*/
 /*--- end                                                          ---*/
 /*--------------------------------------------------------------------*/
Index: coregrind/m_machine.c
===================================================================
--- coregrind/m_machine.c       (revision 11687)
+++ coregrind/m_machine.c       (revision 11688)
@@ -423,7 +423,7 @@
 #if defined(VGA_ppc32) || defined(VGA_ppc64) \
     || defined(VGA_arm) || defined(VGA_s390x)
 #include "pub_tool_libcsetjmp.h"
-static VG_MINIMAL_JMP_BUF env_unsup_insn;
+static VG_MINIMAL_JMP_BUF(env_unsup_insn);
 static void handler_unsup_insn ( Int x ) {
    VG_MINIMAL_LONGJMP(env_unsup_insn);
 }
Index: coregrind/m_debuginfo/readdwarf3.c
===================================================================
--- coregrind/m_debuginfo/readdwarf3.c  (revision 11687)
+++ coregrind/m_debuginfo/readdwarf3.c  (revision 11688)
@@ -3955,7 +3955,7 @@
 
 static Bool               d3rd_jmpbuf_valid  = False;
 static HChar*             d3rd_jmpbuf_reason = NULL;
-static VG_MINIMAL_JMP_BUF d3rd_jmpbuf;
+static VG_MINIMAL_JMP_BUF(d3rd_jmpbuf);
 
 static __attribute__((noreturn)) void barf ( HChar* reason ) {
    vg_assert(d3rd_jmpbuf_valid);
Index: coregrind/pub_core_threadstate.h
===================================================================
--- coregrind/pub_core_threadstate.h    (revision 11687)
+++ coregrind/pub_core_threadstate.h    (revision 11688)
@@ -356,7 +356,7 @@
 
    /* Per-thread jmp_buf to resume scheduler after a signal */
    Bool               sched_jmpbuf_valid;
-   VG_MINIMAL_JMP_BUF sched_jmpbuf;
+   VG_MINIMAL_JMP_BUF(sched_jmpbuf);
 }
 ThreadState;
 
++++++ vg_bug259977_r11689.patch ++++++
Index: include/pub_tool_libcsetjmp.h
===================================================================
--- include/pub_tool_libcsetjmp.h       (revision 11688)
+++ include/pub_tool_libcsetjmp.h       (revision 11689)
@@ -71,6 +71,12 @@
 Int  VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env));
 void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env));
 
+#elif defined(VGP_ppc64_linux)
+
+#define VG_MINIMAL_JMP_BUF(_name)        ULong _name [32+1+1]
+Int  VG_MINIMAL_SETJMP(VG_MINIMAL_JMP_BUF(_env));
+void VG_MINIMAL_LONGJMP(VG_MINIMAL_JMP_BUF(_env));
+
 #else
 
 /* The default implementation. */
Index: coregrind/m_libcsetjmp.c
===================================================================
--- coregrind/m_libcsetjmp.c    (revision 11688)
+++ coregrind/m_libcsetjmp.c    (revision 11689)
@@ -39,11 +39,13 @@
 /* The only alternative implementations are for ppc{32,64}-linux.  See
    #259977. */
 
+/* ------------ ppc32-linux ------------ */
+
 #if defined(VGP_ppc32_linux)
 
 __asm__(
 ".text"  "\n"
-""  "\n"
+""       "\n"
 ".global VG_MINIMAL_SETJMP"  "\n"  // r3 = jmp_buf
 "VG_MINIMAL_SETJMP:"  "\n"
 "        stw     0, 0(3)"  "\n"
@@ -85,7 +87,7 @@
 "        stw     4, 132(3)"  "\n"
 "        li      3, 0"  "\n"
 "        blr"  "\n"
-""  "\n"
+""       "\n"
 
 
 ".global VG_MINIMAL_LONGJMP"  "\n"
@@ -135,15 +137,140 @@
 "        lwz     31, 124(3)"  "\n"
 "        lwz     3, 12(3)"  "\n"
 "        blr"  "\n"
-""  "\n"
+""       "\n"
 
-
 ".previous"  "\n"
 );
 
 #endif /* VGP_ppc32_linux */
 
 
+/* ------------ ppc64-linux ------------ */
+
+#if defined(VGP_ppc64_linux)
+
+__asm__(
+".section \".toc\",\"aw\""          "\n"
+
+".section \".text\""                "\n"
+".align 2"                          "\n"
+".p2align 4,,15"                    "\n"
+".globl VG_MINIMAL_SETJMP"          "\n"
+
+".section \".opd\",\"aw\""          "\n"
+".align 3"                          "\n"
+"VG_MINIMAL_SETJMP:"                "\n"
+".quad .L.VG_MINIMAL_SETJMP,.TOC.@tocbase,0"   "\n"
+".previous"                         "\n"
+
+".type VG_MINIMAL_SETJMP, @function"   "\n"
+".L.VG_MINIMAL_SETJMP:"   "\n"
+"        std     0, 0(3)"  "\n"
+"        std     1, 8(3)"  "\n"
+"        std     2, 16(3)"  "\n"
+"        std     3, 24(3)"  "\n"
+"        std     4, 32(3)"  "\n"
+"        std     5, 40(3)"  "\n"
+"        std     6, 48(3)"  "\n"
+"        std     7, 56(3)"  "\n"
+"        std     8, 64(3)"  "\n"
+"        std     9, 72(3)"  "\n"
+"        std     10, 80(3)"  "\n"
+"        std     11, 88(3)"  "\n"
+"        std     12, 96(3)"  "\n"
+"        std     13, 104(3)"  "\n"
+"        std     14, 112(3)"  "\n"
+"        std     15, 120(3)"  "\n"
+"        std     16, 128(3)"  "\n"
+"        std     17, 136(3)"  "\n"
+"        std     18, 144(3)"  "\n"
+"        std     19, 152(3)"  "\n"
+"        std     20, 160(3)"  "\n"
+"        std     21, 168(3)"  "\n"
+"        std     22, 176(3)"  "\n"
+"        std     23, 184(3)"  "\n"
+"        std     24, 192(3)"  "\n"
+"        std     25, 200(3)"  "\n"
+"        std     26, 208(3)"  "\n"
+"        std     27, 216(3)"  "\n"
+"        std     28, 224(3)"  "\n"
+"        std     29, 232(3)"  "\n"
+"        std     30, 240(3)"  "\n"
+"        std     31, 248(3)"  "\n"
+         // must use a caller-save register here as scratch, hence r4
+"        mflr    4"  "\n"
+"        std     4, 256(3)"  "\n"
+"        mfcr    4"  "\n"
+"        std     4, 264(3)"  "\n"
+"        li      3, 0"  "\n"
+"        blr"  "\n"
+""       "\n"
+
+
+".globl VG_MINIMAL_LONGJMP"         "\n"
+
+".section \".opd\",\"aw\""          "\n"
+".align 3"                          "\n"
+"VG_MINIMAL_LONGJMP:"               "\n"
+".quad .L.VG_MINIMAL_LONGJMP,.TOC.@tocbase,0"   "\n"
+".previous" "\n"
+
+".type   VG_MINIMAL_LONGJMP, @function"    "\n"
+".L.VG_MINIMAL_LONGJMP:"            "\n"
+         // do r4 = 1
+         // and park it in the restore slot for r3 (the ret reg)
+"        li      4, 1"  "\n"
+"        std     4, 24(3)"  "\n"
+         // restore everything except r3
+         // then r3 last of all
+         // then blr
+"        ld      0, 256(3)"  "\n"
+"        mtlr    0"  "\n"
+"        ld      0, 264(3)"  "\n"
+"        mtcr    0"  "\n"
+"        ld      0, 0(3)"  "\n"
+"        ld      1, 8(3)"  "\n"
+"        ld      2, 16(3)"  "\n"
+         // r3 is done at the end
+"        ld      4, 32(3)"  "\n"
+"        ld      5, 40(3)"  "\n"
+"        ld      6, 48(3)"  "\n"
+"        ld      7, 56(3)"  "\n"
+"        ld      8, 64(3)"  "\n"
+"        ld      9, 72(3)"  "\n"
+"        ld      10, 80(3)"  "\n"
+"        ld      11, 88(3)"  "\n"
+"        ld      12, 96(3)"  "\n"
+"        ld      13, 104(3)"  "\n"
+"        ld      14, 112(3)"  "\n"
+"        ld      15, 120(3)"  "\n"
+"        ld      16, 128(3)"  "\n"
+"        ld      17, 136(3)"  "\n"
+"        ld      18, 144(3)"  "\n"
+"        ld      19, 152(3)"  "\n"
+"        ld      20, 160(3)"  "\n"
+"        ld      21, 168(3)"  "\n"
+"        ld      22, 176(3)"  "\n"
+"        ld      23, 184(3)"  "\n"
+"        ld      24, 192(3)"  "\n"
+"        ld      25, 200(3)"  "\n"
+"        ld      26, 208(3)"  "\n"
+"        ld      27, 216(3)"  "\n"
+"        ld      28, 224(3)"  "\n"
+"        ld      29, 232(3)"  "\n"
+"        ld      30, 240(3)"  "\n"
+"        ld      31, 248(3)"  "\n"
+"        ld      3, 24(3)"  "\n"
+"        blr"               "\n"
+""       "\n"
+
+".previous"  "\n"
+".previous"  "\n"
+);
+
+
+#endif /* VGP_ppc64_linux */
+
 /*--------------------------------------------------------------------*/
 /*--- end                                                          ---*/
 /*--------------------------------------------------------------------*/
++++++ vg_bug259977_r11690.patch ++++++
Index: coregrind/m_sigframe/sigframe-x86-darwin.c
===================================================================
--- coregrind/m_sigframe/sigframe-x86-darwin.c  (revision 11689)
+++ coregrind/m_sigframe/sigframe-x86-darwin.c  (revision 11690)
@@ -34,6 +34,7 @@
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
 #include "pub_core_vkiscnums.h"
+#include "pub_core_libcsetjmp.h"    // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 #include "pub_core_aspacemgr.h"
 #include "pub_core_libcbase.h"
Index: coregrind/m_sigframe/sigframe-amd64-darwin.c
===================================================================
--- coregrind/m_sigframe/sigframe-amd64-darwin.c        (revision 11689)
+++ coregrind/m_sigframe/sigframe-amd64-darwin.c        (revision 11690)
@@ -34,6 +34,7 @@
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
 #include "pub_core_vkiscnums.h"
+#include "pub_core_libcsetjmp.h"    // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 #include "pub_core_aspacemgr.h"
 #include "pub_core_libcbase.h"
Index: coregrind/m_syswrap/syswrap-x86-darwin.c
===================================================================
--- coregrind/m_syswrap/syswrap-x86-darwin.c    (revision 11689)
+++ coregrind/m_syswrap/syswrap-x86-darwin.c    (revision 11690)
@@ -32,6 +32,7 @@
 
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
+#include "pub_core_libcsetjmp.h"   // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 #include "pub_core_aspacemgr.h"
 #include "pub_core_xarray.h"
Index: coregrind/m_syswrap/syswrap-amd64-darwin.c
===================================================================
--- coregrind/m_syswrap/syswrap-amd64-darwin.c  (revision 11689)
+++ coregrind/m_syswrap/syswrap-amd64-darwin.c  (revision 11690)
@@ -32,6 +32,7 @@
 
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
+#include "pub_core_libcsetjmp.h"   // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 #include "pub_core_aspacemgr.h"
 #include "pub_core_xarray.h"
Index: coregrind/m_syswrap/syswrap-main.c
===================================================================
--- coregrind/m_syswrap/syswrap-main.c  (revision 11689)
+++ coregrind/m_syswrap/syswrap-main.c  (revision 11690)
@@ -2267,7 +2267,7 @@
    sci->status.what = SsIdle;
 
    vg_assert(tst->sched_jmpbuf_valid);
-   VG_MINIMAL_LONGJMP(tst->sched_jmpbuf, True);
+   VG_MINIMAL_LONGJMP(tst->sched_jmpbuf);
 
    /* NOTREACHED */
    vg_assert(0);
Index: coregrind/m_syswrap/syswrap-darwin.c
===================================================================
--- coregrind/m_syswrap/syswrap-darwin.c        (revision 11689)
+++ coregrind/m_syswrap/syswrap-darwin.c        (revision 11690)
@@ -33,6 +33,7 @@
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
 #include "pub_core_vkiscnums.h"
+#include "pub_core_libcsetjmp.h"   // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 #include "pub_core_aspacemgr.h"
 #include "pub_core_xarray.h"
Index: coregrind/m_initimg/initimg-darwin.c
===================================================================
--- coregrind/m_initimg/initimg-darwin.c        (revision 11689)
+++ coregrind/m_initimg/initimg-darwin.c        (revision 11690)
@@ -47,6 +47,7 @@
 #include "pub_core_ume.h"
 #include "pub_core_options.h"
 #include "pub_core_tooliface.h"       /* VG_TRACK */
+#include "pub_core_libcsetjmp.h"      // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"     /* ThreadArchState */
 #include "priv_initimg_pathscan.h"
 #include "pub_core_initimg.h"         /* self */
Index: coregrind/m_coredump/coredump-macho.c
===================================================================
--- coregrind/m_coredump/coredump-macho.c       (revision 11689)
+++ coregrind/m_coredump/coredump-macho.c       (revision 11690)
@@ -33,6 +33,7 @@
 #include "pub_core_basics.h"
 #include "pub_core_vki.h"
 #include "pub_core_coredump.h"
+#include "pub_core_libcsetjmp.h"   // to keep _threadstate.h happy
 #include "pub_core_threadstate.h"
 
 void VG_(make_coredump)(ThreadId tid, const vki_siginfo_t *si, UInt max_size)
++++++ vg_bug267630_r2127.patch ++++++
++++ 3096 lines (skipped)

++++++ vg_bug270794_r11697.patch ++++++
++++ 7633 lines (skipped)

++++++ vg_bug270851_r2130.patch ++++++
Index: VEX/priv/ir_defs.c
===================================================================
--- VEX/priv/ir_defs.c  (revision 2129)
+++ VEX/priv/ir_defs.c  (revision 2130)
@@ -2265,7 +2265,7 @@
       case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
       case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
       case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
-      case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F64);
+      case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
 
       case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
 
Index: VEX/priv/guest_ppc_toIR.c
===================================================================
--- VEX/priv/guest_ppc_toIR.c   (revision 2129)
+++ VEX/priv/guest_ppc_toIR.c   (revision 2130)
@@ -7256,7 +7256,7 @@
          case 0x3Ce: // fcfidus (Float convert from unsigned DWord to single 
precision)
             DIP("fcfidus%s fr%u,fr%u\n", flag_rC ? ".":"", frD_addr, frB_addr);
             assign( r_tmp64, unop( Iop_ReinterpF64asI64, mkexpr(frB)) );
-            assign( frD, binop( Iop_I64UtoF32, rm, mkexpr( r_tmp64 ) ) );
+            assign( frD, unop( Iop_F32toF64, binop( Iop_I64UtoF32, rm, mkexpr( 
r_tmp64 ) ) ) );
             goto putFR;
       }
    }
Index: VEX/priv/host_ppc_isel.c
===================================================================
--- VEX/priv/host_ppc_isel.c    (revision 2129)
+++ VEX/priv/host_ppc_isel.c    (revision 2130)
@@ -3190,8 +3190,7 @@
          return r_dst;
       }
 
-      if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == Iop_I64UtoF64
-          || e->Iex.Binop.op == Iop_I64UtoF32) {
+      if (e->Iex.Binop.op == Iop_I64StoF64 || e->Iex.Binop.op == 
Iop_I64UtoF64) {
          if (mode64) {
             HReg fdst = newVRegF(env);
             HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
@@ -3206,8 +3205,8 @@
             addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
             addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
             addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, 
-                                          e->Iex.Binop.op == Iop_I64StoF64 ? 
True : False,
-                                          e->Iex.Binop.op == Iop_I64UtoF32 ? 
False : True,
+                                          e->Iex.Binop.op == Iop_I64StoF64,
+                                          True/*fdst is 64 bit*/,
                                           fdst, fdst));
 
             add_to_sp( env, 16 );
@@ -3234,8 +3233,8 @@
             addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
             addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
             addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, 
-                                          e->Iex.Binop.op == Iop_I64StoF64 ? 
True : False,
-                                          e->Iex.Binop.op == Iop_I64UtoF32 ? 
False : True,
+                                          e->Iex.Binop.op == Iop_I64StoF64,
+                                          True/*fdst is 64 bit*/,
                                           fdst, fdst));
 
             add_to_sp( env, 16 );
++++++ vg_bug270851_r2148.patch ++++++
Index: VEX/priv/host_ppc_defs.c
===================================================================
--- VEX/priv/host_ppc_defs.c.orig
+++ VEX/priv/host_ppc_defs.c
@@ -962,17 +962,65 @@ PPCInstr* PPCInstr_FpRSP ( HReg dst, HRe
    i->Pin.FpRSP.src = src;
    return i;
 }
+
+/*
+Valid combo | fromI | int32 | syned | flt64 |
+--------------------------------------------
+            |  n       n       n       n    |
+--------------------------------------------
+ F64->I64U  |  n       n       n       y    |
+--------------------------------------------
+            |  n       n       y       n    |
+--------------------------------------------
+ F64->I64S  |  n       n       y       y    |
+--------------------------------------------
+            |  n       y       n       n    |
+--------------------------------------------
+ F64->I32U  |  n       y       n       y    |
+--------------------------------------------
+            |  n       y       y       n    |
+--------------------------------------------
+ F64->I32S  |  n       y       y       y    |
+--------------------------------------------
+ I64U->F32  |  y       n       n       n    |
+--------------------------------------------
+ I64U->F64  |  y       n       n       y    |
+--------------------------------------------
+            |  y       n       y       n    |
+--------------------------------------------
+ I64S->F64  |  y       n       y       y    |
+--------------------------------------------
+            |  y       y       n       n    |
+--------------------------------------------
+            |  y       y       n       y    |
+--------------------------------------------
+            |  y       y       y       n    |
+--------------------------------------------
+            |  y       y       y       y    |
+--------------------------------------------
+*/
 PPCInstr* PPCInstr_FpCftI ( Bool fromI, Bool int32, Bool syned,
-                            Bool dst64, HReg dst, HReg src ) {
+                            Bool flt64, HReg dst, HReg src ) {
+   Bool tmp = fromI | int32 | syned | flt64;
+   vassert(tmp == True || tmp == False); // iow, no high bits set
+   UShort conversion = 0;
+   conversion = (fromI << 3) | (int32 << 2) | (syned << 1) | flt64;
+   switch (conversion) {
+      // Supported conversion operations
+      case 1: case 3: case 5: case 7:
+      case 8: case 9: case 11:
+         break;
+      default:
+         vpanic("PPCInstr_FpCftI(ppc_host)");
+   }
    PPCInstr* i         = LibVEX_Alloc(sizeof(PPCInstr));
    i->tag              = Pin_FpCftI;
    i->Pin.FpCftI.fromI = fromI;
    i->Pin.FpCftI.int32 = int32;
    i->Pin.FpCftI.syned = syned;
-   i->Pin.FpCftI.dst64 = dst64;
+   i->Pin.FpCftI.flt64 = flt64;
    i->Pin.FpCftI.dst   = dst;
    i->Pin.FpCftI.src   = src;
-   vassert(!(int32 && fromI)); /* no such insn ("fcfiw"). */
    return i;
 }
 PPCInstr* PPCInstr_FpCMov ( PPCCondCode cond, HReg dst, HReg src ) {
@@ -1445,7 +1493,7 @@ void ppPPCInstr ( PPCInstr* i, Bool mode
       if (i->Pin.FpCftI.fromI == True && i->Pin.FpCftI.int32 == False) {
          if (i->Pin.FpCftI.syned == True)
             str = "fcfid";
-         else if (i->Pin.FpCftI.dst64 == True)
+         else if (i->Pin.FpCftI.flt64 == True)
             str = "fcfidu";
          else
             str = "fcfidus";
@@ -3397,7 +3445,7 @@ Int emit_PPCInstr ( UChar* buf, Int nbuf
             // fcfid (conv i64 to f64), PPC64 p434
             p = mkFormX(p, 63, fr_dst, 0, fr_src, 846, 0);
             goto done;
-         } else if (i->Pin.FpCftI.dst64 == True) {
+         } else if (i->Pin.FpCftI.flt64 == True) {
             // fcfidu (conv u64 to f64)
             p = mkFormX(p, 63, fr_dst, 0, fr_src, 974, 0);
             goto done;
Index: VEX/priv/host_ppc_defs.h
===================================================================
--- VEX/priv/host_ppc_defs.h.orig
+++ VEX/priv/host_ppc_defs.h
@@ -461,7 +461,7 @@ typedef
       Pin_FpLdSt,     /* FP load/store */
       Pin_FpSTFIW,    /* stfiwx */
       Pin_FpRSP,      /* FP round IEEE754 double to IEEE754 single */
-      Pin_FpCftI,     /* fcfid/fctid/fctiw */
+      Pin_FpCftI,     /* fcfid[u,s,us]/fctid[u]/fctiw[u] */
       Pin_FpCMov,     /* FP floating point conditional move */
       Pin_FpLdFPSCR,  /* mtfsf */
       Pin_FpCmp,      /* FP compare, generating value into int reg */
@@ -662,13 +662,15 @@ typedef
             HReg src;
             HReg dst;
          } FpRSP;
-         /* fcfid/fctid/fctiw.  Note there's no fcfiw so fromI==True
-            && int32==True is not allowed. */
+         /* fcfid[u,s,us]/fctid[u]/fctiw[u].  Only some combinations
+            of the various fields are allowed.  This is asserted for
+            and documented in the code for the constructor,
+            PPCInstr_FpCftI, in host_ppc_defs.c.  */
          struct {
-            Bool fromI; /* False==F->I, True==I->F */
-            Bool int32; /* True== I is 32, False==I is 64 */
+            Bool fromI; /* True== I->F,    False== F->I */
+            Bool int32; /* True== I is 32, False== I is 64 */
             Bool syned;
-            Bool dst64; /* True==dest is 64bit; False==dest is 32bit */
+            Bool flt64; /* True== F is 64, False== F is 32 */
             HReg src;
             HReg dst;
          } FpCftI;
Index: VEX/priv/host_ppc_isel.c
===================================================================
--- VEX/priv/host_ppc_isel.c.orig
+++ VEX/priv/host_ppc_isel.c
@@ -1471,8 +1471,9 @@ static HReg iselWordExpr_R_wrk ( ISelEnv
          set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
 
          sub_from_sp( env, 16 );
-         addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/, True,
-                                       False, ftmp, fsrc));
+         addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/,
+                                       True/*syned*/, True/*flt64*/,
+                                       ftmp, fsrc));
          addInstr(env, PPCInstr_FpSTFIW(r1, ftmp));
          addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
 
@@ -2959,6 +2960,8 @@ static HReg iselFltExpr ( ISelEnv* env,
 /* DO NOT CALL THIS DIRECTLY */
 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
 {
+   Bool        mode64 = env->mode64;
+
    IRType ty = typeOfIRExpr(env->type_env,e);
    vassert(ty == Ity_F32);
 
@@ -3027,6 +3030,60 @@ static HReg iselFltExpr_wrk ( ISelEnv* e
       return fdst;
    }
 
+   if (e->tag == Iex_Binop && e->Iex.Binop.op == Iop_I64UtoF32) {
+      if (mode64) {
+         HReg fdst = newVRegF(env);
+         HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
+         HReg r1   = StackFramePtr(env->mode64);
+         PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
+
+         /* Set host rounding mode */
+         set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
+
+         sub_from_sp( env, 16 );
+
+         addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
+         addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
+         addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, 
+                                       False, False,
+                                       fdst, fdst));
+
+         add_to_sp( env, 16 );
+
+         ///* Restore default FPU rounding. */
+         //set_FPU_rounding_default( env );
+         return fdst;
+      } else {
+         /* 32-bit mode */
+         HReg fdst = newVRegF(env);
+         HReg isrcHi, isrcLo;
+         HReg r1   = StackFramePtr(env->mode64);
+         PPCAMode* zero_r1 = PPCAMode_IR( 0, r1 );
+         PPCAMode* four_r1 = PPCAMode_IR( 4, r1 );
+
+         iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
+
+         /* Set host rounding mode */
+         set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
+
+         sub_from_sp( env, 16 );
+
+         addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/));
+         addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
+         addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
+         addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/, 
+                                       False, False,
+                                       fdst, fdst));
+
+         add_to_sp( env, 16 );
+
+         ///* Restore default FPU rounding. */
+         //set_FPU_rounding_default( env );
+         return fdst;
+      }
+
+   }
+
    vex_printf("iselFltExpr(ppc): No such tag(%u)\n", e->tag);
    ppIRExpr(e);
    vpanic("iselFltExpr_wrk(ppc)");
++++++ vg_bug270856_r2136.patch ++++++
Index: VEX/priv/host_ppc_isel.c
===================================================================
--- VEX/priv/host_ppc_isel.c    (revision 2135)
+++ VEX/priv/host_ppc_isel.c    (revision 2136)
@@ -1615,6 +1615,7 @@
       case Iop_Not16:
       case Iop_Not32:
       case Iop_Not64: {
+         if (op_unop == Iop_Not64) vassert(mode64);
          HReg r_dst = newVRegI(env);
          HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
          addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src));
@@ -2885,6 +2886,18 @@
          return;
       }
 
+      case Iop_Not64: {
+         HReg xLo, xHi;
+         HReg tmpLo = newVRegI(env);
+         HReg tmpHi = newVRegI(env);
+         iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
+         addInstr(env, PPCInstr_Unary(Pun_NOT,tmpLo,xLo));
+         addInstr(env, PPCInstr_Unary(Pun_NOT,tmpHi,xHi));
+         *rHi = tmpHi;
+         *rLo = tmpLo;
+         return;
+      }
+
       /* ReinterpF64asI64(e) */
       /* Given an IEEE754 double, produce an I64 with the same bit
          pattern. */
++++++ vg_bug271042_r11699.patch ++++++
Index: configure.in
===================================================================
--- configure.in        (revision 11698)
+++ configure.in        (revision 11699)
@@ -986,7 +986,7 @@
 #include <altivec.h>
 ], [
   vector unsigned int v;
-  __asm__ __volatile__("xsmaddadp %vs32, %vs32, %vs33" ::: "memory","cc");
+  __asm__ __volatile__("xsmaddadp 32, 32, 33" ::: "memory","cc");
 ],
 [
 ac_have_vsx=yes
++++++ vg_bug271043_r11700.patch ++++++
Index: coregrind/m_dispatch/dispatch-ppc64-linux.S
===================================================================
--- coregrind/m_dispatch/dispatch-ppc64-linux.S (revision 11699)
+++ coregrind/m_dispatch/dispatch-ppc64-linux.S (revision 11700)
@@ -310,7 +310,7 @@
        /* start over */
        b       .VG_(run_innerloop__dispatch_unprofiled)
        /*NOTREACHED*/
-        .size VG_(run_innerloop), .-VG_(run_innerloop)
+        .size .VG_(run_innerloop), .-.VG_(run_innerloop)
 
 
 /*----------------------------------------------------*/
@@ -385,7 +385,7 @@
        /* start over */
        b       .VG_(run_innerloop__dispatch_profiled)
        /*NOTREACHED*/
-        .size VG_(run_a_noredir_translation), .-VG_(run_a_noredir_translation)
+        .size .VG_(run_a_noredir_translation), 
.-.VG_(run_a_noredir_translation)
 
 
 /*----------------------------------------------------*/
++++++ vg_bug271043_r11765.patch ++++++
Index: coregrind/m_syswrap/syswrap-ppc64-linux.c
===================================================================
--- coregrind/m_syswrap/syswrap-ppc64-linux.c   (revision 11764)
+++ coregrind/m_syswrap/syswrap-ppc64-linux.c   (revision 11765)
@@ -1380,7 +1380,7 @@
 // _____(__NR_rt_sigsuspend,     sys_rt_sigsuspend),      // 178
    GENXY(__NR_pread64,           sys_pread64),            // 179
 
-// _____(__NR_pwrite64,          sys_pwrite64),           // 180
+   GENX_(__NR_pwrite64,          sys_pwrite64),           // 180
    GENX_(__NR_chown,             sys_chown),              // 181
    GENXY(__NR_getcwd,            sys_getcwd),             // 182
    LINXY(__NR_capget,            sys_capget),             // 183

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++



Remember to have fun...

-- 
To unsubscribe, e-mail: opensuse-commit+unsubscr...@opensuse.org
For additional commands, e-mail: opensuse-commit+h...@opensuse.org

Reply via email to