Hello community,

here is the log from the commit of package mpir for openSUSE:Factory checked in 
at 2017-03-02 19:35:16
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/mpir (Old)
 and      /work/SRC/openSUSE:Factory/.mpir.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "mpir"

Thu Mar  2 19:35:16 2017 rev:4 rq:460362 version:3.0.0~alpha3

Changes:
--------
--- /work/SRC/openSUSE:Factory/mpir/mpir.changes        2015-12-01 
09:19:10.000000000 +0100
+++ /work/SRC/openSUSE:Factory/.mpir.new/mpir.changes   2017-03-02 
19:35:16.901074890 +0100
@@ -1,0 +2,14 @@
+Mon Feb 20 23:44:36 UTC 2017 - jeng...@inai.de
+
+- Update to new snapshot 3.0.0~alpha3
+  * New Intel Skylake and Haswell assembly support
+  * Rudimentary Broadwell support (not optimisation)
+  * Improved AMD Bulldozer support
+  * Faster mpz_powm, mpz_powm_ui from GMP
+  * New mpz_limbs functionality from GMP 6
+  * New mpn_sizeinbase, mullow_basecase_n, binvert, redc_1, redc_2,
+    redc_n functions from GMP 6.
+  * New mpn_nsumdiff_n function (speeds up FFT on Haswell)
+- Add 0001-Fix-32-bit-fat-build.patch
+
+-------------------------------------------------------------------

Old:
----
  mpir-2.7.2.tar.lz

New:
----
  0001-Fix-32-bit-fat-build.patch
  mpir-3.0.0-alpha3.tar.bz2

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ mpir.spec ++++++
--- /var/tmp/diff_new_pack.AMVzEN/_old  2017-03-02 19:35:17.616973580 +0100
+++ /var/tmp/diff_new_pack.AMVzEN/_new  2017-03-02 19:35:17.616973580 +0100
@@ -1,7 +1,7 @@
 #
 # spec file for package mpir
 #
-# Copyright (c) 2015 SUSE LINUX GmbH, Nuernberg, Germany.
+# Copyright (c) 2017 SUSE LINUX GmbH, Nuernberg, Germany.
 #
 # All modifications and additions to the file contributed by third parties
 # remain the property of their copyright owners, unless otherwise agreed
@@ -17,9 +17,9 @@
 
 
 Name:           mpir
-%define lname  libmpir16
+%define lname  libmpir23
 %define lnamexx        libmpirxx8
-Version:        2.7.2
+Version:        3.0.0~alpha3
 Release:        0
 Summary:        Multiprecision integer library derived from GMP
 License:        LGPL-3.0+
@@ -28,11 +28,12 @@
 
 #Git-Clone:    git://github.com/wbhart/mpir
 #Git-Web:      https://github.com/wbhart/mpir
-Source:         http://mpir.org/%name-%version.tar.lz
+Source:         http://mpir.org/mpir-3.0.0-alpha3.tar.bz2
 Patch1:         gmp-noexec.diff
+Patch2:         0001-Fix-32-bit-fat-build.patch
 BuildRoot:      %{_tmppath}/%{name}-%{version}-build
 BuildRequires:  gcc-c++
-BuildRequires:  lzip
+BuildRequires:  yasm >= 1.3
 # ppc64le excluded because asm files in
 # mpn/powerpc64/mode64/* are ABI version 1.
 ExcludeArch:    ppc64le
@@ -80,8 +81,8 @@
 applications that want to make use of libmpir.
 
 %prep
-%setup -q
-%patch -P 1 -p1
+%setup -qn mpir-3.0.0
+%patch -P 1 -P 2 -p1
 
 %build
 export CFLAGS="%optflags -fexceptions"
@@ -89,7 +90,7 @@
 # SLES11 %%configure contains --target=, but this is wrong to use.
 # Override with empty value to calm the scripts flagging uses of --target.
 %configure --target="" --disable-static \
-       --disable-mpfr --enable-cxx
+       --disable-mpfr --enable-cxx --enable-fat
 make %{?_smp_mflags}
 
 %install

++++++ 0001-Fix-32-bit-fat-build.patch ++++++
>From ae043b12f88991641e58dbed001ac851ad9ff5a3 Mon Sep 17 00:00:00 2001
From: William Hart <goodwillh...@googlemail.com>
Date: Wed, 22 Feb 2017 11:13:05 +0000
Subject: [PATCH] Fix 32 bit fat build.

---
 mpn/x86/fat/fat.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/mpn/x86/fat/fat.c b/mpn/x86/fat/fat.c
index 155dcfd4..095f1148 100644
--- a/mpn/x86/fat/fat.c
+++ b/mpn/x86/fat/fat.c
@@ -109,6 +109,9 @@ struct cpuvec_t __gmpn_cpuvec = {
 #define CPUSETUP_sandybridge   CPUVEC_SETUP_nehalem
 #define CPUSETUP_ivybridge     CPUVEC_SETUP_nehalem
 #define CPUSETUP_haswell       CPUVEC_SETUP_nehalem
+#define CPUSETUP_broadwell      CPUVEC_SETUP_nehalem
+#define CPUSETUP_skylake        CPUVEC_SETUP_nehalem
+#define CPUSETUP_skylakeavx     CPUVEC_SETUP_nehalem
 #define CPUSETUP_atom          
CPUVEC_SETUP_p6;CPUVEC_SETUP_p6_mmx;CPUVEC_SETUP_p6_p3mmx
 #define CPUSETUP_nano          
CPUVEC_SETUP_p6;CPUVEC_SETUP_p6_mmx;CPUVEC_SETUP_p6_p3mmx
 #define CPUSETUP_pentium4      
CPUVEC_SETUP_pentium4;CPUVEC_SETUP_pentium4_mmx;CPUVEC_SETUP_pentium4_sse2
-- 
2.11.0


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