Hello community,
here is the log from the commit of package mcelog for openSUSE:Factory checked
in at 2018-10-01 09:06:40
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/mcelog (Old)
and /work/SRC/openSUSE:Factory/.mcelog.new (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "mcelog"
Mon Oct 1 09:06:40 2018 rev:48 rq:637681 version:1.60
Changes:
--------
--- /work/SRC/openSUSE:Factory/mcelog/mcelog.changes 2017-11-29
10:51:12.983792459 +0100
+++ /work/SRC/openSUSE:Factory/.mcelog.new/mcelog.changes 2018-10-01
09:06:45.743823400 +0200
@@ -1,0 +2,16 @@
+Fri Sep 21 15:52:28 UTC 2018 - opensuse-packag...@opensuse.org
+
+(by tr...@suse.de)
+- Update to version 1.60 (fate#326221):
+ * Turn back rb_color field into unsigned long
+ * trigger: add a sync argument for waiting trigger child process exit
+ * page: trigger: add pre/post sync trigger when doing soft memory offline
+ * fixed build errors for some lose code when merging code
+ * transfer the page address to pre/post-sync-trigger scripts
+ * mcelog: Fix "--ascii" parsing to cope with change in kernel output since
v4.10
+ * Remove now unused local variable
+ * Add scripts file to do MCA error code validation for a selected CPU model
+ * Add license file
+ * mcelog: Improve decoding for APEI reported errors
+
+-------------------------------------------------------------------
Old:
----
mcelog-1.53.tar.xz
New:
----
mcelog-1.60.tar.xz
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ mcelog.spec ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.531822724 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.531822724 +0200
@@ -1,7 +1,7 @@
#
# spec file for package mcelog
#
-# Copyright (c) 2017 SUSE LINUX GmbH, Nuernberg, Germany.
+# Copyright (c) 2018 SUSE LINUX GmbH, Nuernberg, Germany.
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
@@ -22,7 +22,7 @@
%endif
Name: mcelog
-Version: 1.53
+Version: 1.60
Release: 0
Summary: Log Machine Check Events
License: GPL-2.0
++++++ Start-consolidating-AMD-specific-stuff.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.571822690 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.571822690 +0200
@@ -16,11 +16,11 @@
rename k8.c => amd.c (97%)
rename k8.h => amd.h (79%)
-Index: mcelog-1.36/Makefile
+Index: mcelog-1.60/Makefile
===================================================================
---- mcelog-1.36.orig/Makefile 2016-05-03 17:44:06.934899300 +0200
-+++ mcelog-1.36/Makefile 2016-05-03 17:44:29.032158410 +0200
-@@ -33,7 +33,7 @@ all: mcelog
+--- mcelog-1.60.orig/Makefile 2018-09-24 15:14:09.591339926 +0200
++++ mcelog-1.60/Makefile 2018-09-24 15:14:18.771885991 +0200
+@@ -30,7 +30,7 @@ all: mcelog
.PHONY: install clean depend FORCE
@@ -29,9 +29,9 @@
nehalem.o dunnington.o tulsa.o config.o memutil.o msg.o \
eventloop.o leaky-bucket.o memdb.o server.o trigger.o \
client.o cache.o sysfs.o yellow.o page.o rbtree.o \
-Index: mcelog-1.36/k8.c
+Index: mcelog-1.60/k8.c
===================================================================
---- mcelog-1.36.orig/k8.c 2016-05-03 17:44:06.938899528 +0200
+--- mcelog-1.60.orig/k8.c 2018-08-09 23:49:49.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,281 +0,0 @@
-/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and
@@ -315,10 +315,10 @@
- }
- return 1;
-}
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ mcelog-1.36/amd.c 2016-05-03 17:44:29.036158703 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:14:18.771885991 +0200
@@ -0,0 +1,282 @@
+/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and
+ * Eric Morton. Hacked and extended for mcelog by AK.
@@ -602,9 +602,9 @@
+ }
+ return 1;
+}
-Index: mcelog-1.36/k8.h
+Index: mcelog-1.60/k8.h
===================================================================
---- mcelog-1.36.orig/k8.h 2016-05-03 17:44:06.938899528 +0200
+--- mcelog-1.60.orig/k8.h 2018-08-09 23:49:49.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,11 +0,0 @@
-char *k8_bank_name(unsigned num);
@@ -618,10 +618,10 @@
-#define K8_MCELOG_THRESHOLD_LINK (4 * 9 + 1)
-#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2)
-#define K8_MCELOG_THRESHOLD_FBDIMM (4 * 9 + 3)
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
-+++ mcelog-1.36/amd.h 2016-05-03 17:44:29.036158703 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:14:18.775886227 +0200
@@ -0,0 +1,14 @@
+char *k8_bank_name(unsigned num);
+void decode_amd_mc(enum cputype, struct mce *mce, int *ismemerr);
@@ -637,10 +637,10 @@
+
+#define CASE_AMD_CPUS \
+ case CPU_K8
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:44:06.938899528 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:44:29.036158703 +0200
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:14:09.599340401 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:14:18.775886227 +0200
@@ -41,7 +41,7 @@
#include <fnmatch.h>
#include "mcelog.h"
@@ -650,7 +650,7 @@
#include "intel.h"
#include "p4.h"
#include "dmi.h"
-@@ -421,9 +421,9 @@ static void dump_mce(struct mce *m, unsi
+@@ -429,9 +429,9 @@ static void dump_mce(struct mce *m, unsi
time_t t = m->time;
Wprintf("TIME %llu %s", m->time, ctime(&t));
}
++++++ _service ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.587822676 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.587822676 +0200
@@ -4,9 +4,9 @@
<param name="url">https://github.com/andikleen/mcelog</param>
<param name="subdir"></param>
<param name="filename">mcelog</param>
- <param name="versionformat">1.53</param>
+ <param name="versionformat">1.60</param>
<param name="changesgenerate">enable</param>
- <param name="revision">refs/tags/v153</param>
+ <param name="revision">refs/tags/v160</param>
</service>
<service name="recompress" mode="disabled">
<param name="file">mcelog*.tar</param>
++++++ _servicedata ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.615822652 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.615822652 +0200
@@ -1,4 +1,4 @@
<servicedata>
<service name="tar_scm">
<param name="url">https://github.com/andikleen/mcelog</param>
- <param
name="changesrevision">524ed1cd16de5adcb4a5015777d3dfc63afda1fe</param></service></servicedata>
\ No newline at end of file
+ <param
name="changesrevision">10b832edec31d48adf414709dec9327354310f52</param></service></servicedata>
\ No newline at end of file
++++++ add-f10h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.623822645 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.623822645 +0200
@@ -1,10 +1,10 @@
Add F10h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.46/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.46.orig/amd.c
-+++ mcelog-1.46/amd.c
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:14:18.771885991 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:05.902689347 +0200
@@ -14,7 +14,7 @@
#include "mcelog.h"
#include "amd.h"
@@ -554,10 +554,10 @@
+ }
+ return 1;
}
-Index: mcelog-1.46/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.46.orig/amd.h
-+++ mcelog-1.46/amd.h
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:14:55.678081186 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:05.902689347 +0200
@@ -1,6 +1,25 @@
+#include <stdbool.h>
+
@@ -632,11 +632,11 @@
+#define CASE_AMD_CPUS \
+ case CPU_K8: \
+ case CPU_F10H
-Index: mcelog-1.46/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.46.orig/mcelog.h
-+++ mcelog-1.46/mcelog.h
-@@ -111,6 +111,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:14:09.599340401 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:05.902689347 +0200
+@@ -117,6 +117,7 @@ enum cputype {
CPU_P6OLD,
CPU_CORE2, /* 65nm and 45nm */
CPU_K8,
@@ -644,11 +644,11 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.46/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.46.orig/mcelog.c
-+++ mcelog-1.46/mcelog.c
-@@ -144,19 +144,20 @@ static void resolveaddr(unsigned long lo
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:14:18.775886227 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:05.906689585 +0200
+@@ -147,19 +147,20 @@ static void resolveaddr(unsigned long lo
static int mce_filter(struct mce *m, unsigned recordlen)
{
@@ -673,7 +673,7 @@
}
static void print_tsc(int cpunum, __u64 tsc, unsigned long time)
-@@ -223,6 +224,7 @@ static char *cputype_name[] = {
+@@ -226,6 +227,7 @@ static char *cputype_name[] = {
[CPU_P6OLD] = "Intel PPro/P2/P3/old Xeon",
[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
[CPU_K8] = "AMD K8 and derivates",
@@ -681,7 +681,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -252,6 +254,7 @@ static struct config_choice cpu_choices[
+@@ -255,6 +257,7 @@ static struct config_choice cpu_choices[
{ "p6old", CPU_P6OLD },
{ "core2", CPU_CORE2 },
{ "k8", CPU_K8 },
@@ -689,7 +689,7 @@
{ "p4", CPU_P4 },
{ "dunnington", CPU_DUNNINGTON },
{ "xeon74xx", CPU_DUNNINGTON },
-@@ -363,9 +366,7 @@ static enum cputype setup_cpuid(u32 cpuv
+@@ -366,9 +369,7 @@ static enum cputype setup_cpuid(u32 cpuv
case X86_VENDOR_INTEL:
return select_intel_cputype(family, model);
case X86_VENDOR_AMD:
@@ -700,7 +700,7 @@
default:
Eprintf("Unknown CPU type vendor %u family %u model %u",
cpuvendor, family, model);
-@@ -542,14 +543,9 @@ int is_cpu_supported(void)
+@@ -551,14 +552,9 @@ int is_cpu_supported(void)
}
if (seen == ALL) {
++++++ add-f11h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.627822641 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.631822638 +0200
@@ -1,10 +1,10 @@
Add F11h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.36.orig/amd.c 2016-05-03 17:45:35.943971068 +0200
-+++ mcelog-1.36/amd.c 2016-05-03 17:45:39.500173684 +0200
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:05.902689347 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:10.454960116 +0200
@@ -155,6 +155,8 @@ enum cputype select_amd_cputype(u32 fami
return CPU_K8;
case 0x10:
@@ -54,10 +54,10 @@
default:
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
return;
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.36.orig/amd.h 2016-05-03 17:45:35.943971068 +0200
-+++ mcelog-1.36/amd.h 2016-05-03 17:45:39.500173684 +0200
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:05.902689347 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:10.454960116 +0200
@@ -93,4 +93,5 @@ enum rrrr_ids {
#define CASE_AMD_CPUS \
@@ -65,11 +65,11 @@
- case CPU_F10H
+ case CPU_F10H: \
+ case CPU_F11H
-Index: mcelog-1.36/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:35.943971068 +0200
-+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:39.500173684 +0200
-@@ -112,6 +112,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:05.902689347 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:10.454960116 +0200
+@@ -118,6 +118,7 @@ enum cputype {
CPU_CORE2, /* 65nm and 45nm */
CPU_K8,
CPU_F10H,
@@ -77,11 +77,11 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:35.943971068 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:39.500173684 +0200
-@@ -226,6 +226,7 @@ static char *cputype_name[] = {
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:05.906689585 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:10.458960355 +0200
+@@ -228,6 +228,7 @@ static char *cputype_name[] = {
[CPU_CORE2] = "Intel Core", /* 65nm and 45nm */
[CPU_K8] = "AMD K8 and derivates",
[CPU_F10H] = "AMD Greyhound",
@@ -89,7 +89,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -253,6 +254,7 @@ static struct config_choice cpu_choices[
+@@ -258,6 +259,7 @@ static struct config_choice cpu_choices[
{ "core2", CPU_CORE2 },
{ "k8", CPU_K8 },
{ "f10h", CPU_F10H },
++++++ add-f12h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.635822635 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.635822635 +0200
@@ -1,10 +1,10 @@
Add F12h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.36.orig/amd.c 2016-05-03 17:45:39.500173684 +0200
-+++ mcelog-1.36/amd.c 2016-05-03 17:45:41.996315929 +0200
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:10.454960116 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:15.607266576 +0200
@@ -157,6 +157,8 @@ enum cputype select_amd_cputype(u32 fami
return CPU_F10H;
case 0x11:
@@ -37,10 +37,10 @@
default:
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
return;
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.36.orig/amd.h 2016-05-03 17:45:39.500173684 +0200
-+++ mcelog-1.36/amd.h 2016-05-03 17:45:41.996315929 +0200
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:10.454960116 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:15.607266576 +0200
@@ -9,6 +9,7 @@ enum amdcpu {
AMD_K8 = 0,
AMD_F10H,
@@ -56,11 +56,11 @@
- case CPU_F11H
+ case CPU_F11H: \
+ case CPU_F12H
-Index: mcelog-1.36/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:39.500173684 +0200
-+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:41.996315929 +0200
-@@ -113,6 +113,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:10.454960116 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:15.607266576 +0200
+@@ -119,6 +119,7 @@ enum cputype {
CPU_K8,
CPU_F10H,
CPU_F11H,
@@ -68,11 +68,11 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:39.500173684 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:41.996315929 +0200
-@@ -227,6 +227,7 @@ static char *cputype_name[] = {
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:10.458960355 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:15.611266814 +0200
+@@ -229,6 +229,7 @@ static char *cputype_name[] = {
[CPU_K8] = "AMD K8 and derivates",
[CPU_F10H] = "AMD Greyhound",
[CPU_F11H] = "AMD Griffin",
@@ -80,7 +80,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -255,6 +256,7 @@ static struct config_choice cpu_choices[
+@@ -260,6 +261,7 @@ static struct config_choice cpu_choices[
{ "k8", CPU_K8 },
{ "f10h", CPU_F10H },
{ "f11h", CPU_F11H },
++++++ add-f14h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.647822624 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.647822624 +0200
@@ -1,10 +1,10 @@
Add F14h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.36.orig/amd.c 2016-05-03 17:45:41.996315929 +0200
-+++ mcelog-1.36/amd.c 2016-05-03 17:45:43.452398891 +0200
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:15.607266576 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:19.007468820 +0200
@@ -159,6 +159,8 @@ enum cputype select_amd_cputype(u32 fami
return CPU_F11H;
case 0x12:
@@ -128,11 +128,11 @@
default:
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
return;
-Index: mcelog-1.36/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:41.996315929 +0200
-+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:43.452398891 +0200
-@@ -114,6 +114,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:15.607266576 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:19.007468820 +0200
+@@ -120,6 +120,7 @@ enum cputype {
CPU_F10H,
CPU_F11H,
CPU_F12H,
@@ -140,10 +140,10 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.36.orig/amd.h 2016-05-03 17:45:41.996315929 +0200
-+++ mcelog-1.36/amd.h 2016-05-03 17:45:43.452398891 +0200
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:15.607266576 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:19.007468820 +0200
@@ -96,4 +96,5 @@ enum rrrr_ids {
case CPU_K8: \
case CPU_F10H: \
@@ -151,11 +151,11 @@
- case CPU_F12H
+ case CPU_F12H: \
+ case CPU_F14H
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:41.996315929 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:43.456399118 +0200
-@@ -228,6 +228,7 @@ static char *cputype_name[] = {
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:15.611266814 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:19.011469058 +0200
+@@ -230,6 +230,7 @@ static char *cputype_name[] = {
[CPU_F10H] = "AMD Greyhound",
[CPU_F11H] = "AMD Griffin",
[CPU_F12H] = "AMD Llano",
@@ -163,7 +163,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -257,6 +258,7 @@ static struct config_choice cpu_choices[
+@@ -262,6 +263,7 @@ static struct config_choice cpu_choices[
{ "f10h", CPU_F10H },
{ "f11h", CPU_F11H },
{ "f12h", CPU_F12H },
++++++ add-f15h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.655822618 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.659822614 +0200
@@ -1,10 +1,10 @@
Add F15h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.36.orig/amd.c 2016-05-03 17:45:43.452398891 +0200
-+++ mcelog-1.36/amd.c 2016-05-03 17:45:45.316505087 +0200
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:19.007468820 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:22.903700568 +0200
@@ -72,6 +72,43 @@ static char *nbextendederr[] = {
"L3 Cache LRU Error"
};
@@ -214,11 +214,11 @@
default:
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
return;
-Index: mcelog-1.36/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:43.452398891 +0200
-+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:45.316505087 +0200
-@@ -115,6 +115,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:19.007468820 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:22.907700806 +0200
+@@ -121,6 +121,7 @@ enum cputype {
CPU_F11H,
CPU_F12H,
CPU_F14H,
@@ -226,10 +226,10 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.36.orig/amd.h 2016-05-03 17:45:43.452398891 +0200
-+++ mcelog-1.36/amd.h 2016-05-03 17:45:45.316505087 +0200
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:19.007468820 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:22.907700806 +0200
@@ -97,4 +97,5 @@ enum rrrr_ids {
case CPU_F10H: \
case CPU_F11H: \
@@ -237,11 +237,11 @@
- case CPU_F14H
+ case CPU_F14H: \
+ case CPU_F15H
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:43.456399118 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:45.320505319 +0200
-@@ -229,6 +229,7 @@ static char *cputype_name[] = {
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:19.011469058 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:22.907700806 +0200
+@@ -231,6 +231,7 @@ static char *cputype_name[] = {
[CPU_F11H] = "AMD Griffin",
[CPU_F12H] = "AMD Llano",
[CPU_F14H] = "AMD Bobcat",
@@ -249,7 +249,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -259,6 +260,7 @@ static struct config_choice cpu_choices[
+@@ -264,6 +265,7 @@ static struct config_choice cpu_choices[
{ "f11h", CPU_F11H },
{ "f12h", CPU_F12H },
{ "f14h", CPU_F14H },
++++++ add-f16h-support.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.667822607 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.671822604 +0200
@@ -1,10 +1,10 @@
Add F16h decoding support
Signed-off-by: Borislav Petkov <b...@suse.de>
-Index: mcelog-1.36/amd.c
+Index: mcelog-1.60/amd.c
===================================================================
---- mcelog-1.36.orig/amd.c 2016-05-03 17:45:45.316505087 +0200
-+++ mcelog-1.36/amd.c 2016-05-03 17:45:47.828648285 +0200
+--- mcelog-1.60.orig/amd.c 2018-09-24 15:15:33.848351555 +0200
++++ mcelog-1.60/amd.c 2018-09-24 15:15:35.660459339 +0200
@@ -200,6 +200,8 @@ enum cputype select_amd_cputype(u32 fami
return CPU_F14H;
case 0x15:
@@ -86,11 +86,11 @@
default:
Eprintf("Huh? What family is it: 0x%x?!\n", cpu);
return;
-Index: mcelog-1.36/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.36.orig/mcelog.h 2016-05-03 17:45:45.316505087 +0200
-+++ mcelog-1.36/mcelog.h 2016-05-03 17:45:47.828648285 +0200
-@@ -116,6 +116,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:15:33.848351555 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:15:35.664459576 +0200
+@@ -122,6 +122,7 @@ enum cputype {
CPU_F12H,
CPU_F14H,
CPU_F15H,
@@ -98,10 +98,10 @@
CPU_P4,
CPU_NEHALEM,
CPU_DUNNINGTON,
-Index: mcelog-1.36/amd.h
+Index: mcelog-1.60/amd.h
===================================================================
---- mcelog-1.36.orig/amd.h 2016-05-03 17:45:45.316505087 +0200
-+++ mcelog-1.36/amd.h 2016-05-03 17:45:47.832648501 +0200
+--- mcelog-1.60.orig/amd.h 2018-09-24 15:15:33.848351555 +0200
++++ mcelog-1.60/amd.h 2018-09-24 15:15:35.664459576 +0200
@@ -98,4 +98,5 @@ enum rrrr_ids {
case CPU_F11H: \
case CPU_F12H: \
@@ -109,11 +109,11 @@
- case CPU_F15H
+ case CPU_F15H: \
+ case CPU_F16H
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:45.320505319 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:47.832648501 +0200
-@@ -230,6 +230,7 @@ static char *cputype_name[] = {
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:33.848351555 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:35.668459814 +0200
+@@ -232,6 +232,7 @@ static char *cputype_name[] = {
[CPU_F12H] = "AMD Llano",
[CPU_F14H] = "AMD Bobcat",
[CPU_F15H] = "AMD Bulldozer",
@@ -121,7 +121,7 @@
[CPU_P4] = "Intel P4",
[CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7
(\"Nehalem/Westmere\")",
[CPU_DUNNINGTON] = "Intel Xeon 7400 series",
-@@ -261,6 +262,7 @@ static struct config_choice cpu_choices[
+@@ -266,6 +267,7 @@ static struct config_choice cpu_choices[
{ "f12h", CPU_F12H },
{ "f14h", CPU_F14H },
{ "f15h", CPU_F15H },
++++++ email.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.675822601 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.679822597 +0200
@@ -7,16 +7,16 @@
msg.c | 8 ++
6 files changed, 343 insertions(+), 2 deletions(-)
-Index: mcelog-1.53/Makefile
+Index: mcelog-1.60/Makefile
===================================================================
---- mcelog-1.53.orig/Makefile
-+++ mcelog-1.53/Makefile
+--- mcelog-1.60.orig/Makefile 2018-09-24 15:06:48.757117766 +0200
++++ mcelog-1.60/Makefile 2018-09-24 15:07:38.900100531 +0200
@@ -1,3 +1,4 @@
+CONFIG_EMAIL := 1
CFLAGS := -g -Os
prefix := /usr
etcprefix :=
-@@ -35,15 +36,23 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
+@@ -37,15 +38,23 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co
broadwell_de.o broadwell_epex.o skylake_xeon.o \
denverton.o \
msr.o bus.o unknown.o
@@ -41,7 +41,7 @@
# dbquery intentionally not installed by default
install: mcelog mcelog.conf mcelog.conf.5 mcelog.triggers.5
-@@ -78,7 +87,7 @@ dbquery: db.o dbquery.o memutil.o
+@@ -80,7 +89,7 @@ dbquery: db.o dbquery.o memutil.o
depend: .depend
%.o: %.c
@@ -50,10 +50,10 @@
version.tmp: FORCE
( printf "char version[] = \"" ; \
-Index: mcelog-1.53/email.c
+Index: mcelog-1.60/email.c
===================================================================
---- /dev/null
-+++ mcelog-1.53/email.c
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ mcelog-1.60/email.c 2018-09-24 15:07:38.904100771 +0200
@@ -0,0 +1,200 @@
+#include <unistd.h>
+#include <signal.h>
@@ -255,10 +255,10 @@
+ smtp_destroy_session (session);
+ return 0;
+}
-Index: mcelog-1.53/email.h
+Index: mcelog-1.60/email.h
===================================================================
---- /dev/null
-+++ mcelog-1.53/email.h
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ mcelog-1.60/email.h 2018-09-24 15:07:38.904100771 +0200
@@ -0,0 +1,34 @@
+#ifndef _MCELOG_EMAIL_H_
+#define _MCELOG_EMAIL_H_
@@ -294,10 +294,10 @@
+#endif
+
+#endif
-Index: mcelog-1.53/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.53.orig/mcelog.c
-+++ mcelog-1.53/mcelog.c
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:06:48.765118243 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:12:49.910600461 +0200
@@ -37,6 +37,7 @@
#include <assert.h>
#include <signal.h>
@@ -325,23 +325,23 @@
static char *inputfile;
char *processor_flags;
static int foreground;
-@@ -983,6 +987,7 @@ void usage(void)
- "--no-imc-log Disable extended iMC logging\n"
+@@ -990,6 +994,7 @@ void usage(void)
"--is-cpu-supported Exit with return code indicating whether the CPU is
supported\n"
+ "--help Display this message.\n"
);
+ email_usage();
printf("\n");
print_cputypes();
- exit(1);
-@@ -1051,6 +1056,7 @@ static struct option options[] = {
- { "debug-numerrors", 0, NULL, O_DEBUG_NUMERRORS }, /* undocumented: for
testing */
+ }
+@@ -1059,6 +1064,7 @@ static struct option options[] = {
{ "no-imc-log", 0, NULL, O_NO_IMC_LOG },
+ { "help", 0, NULL, O_HELP },
{ "is-cpu-supported", 0, NULL, O_IS_CPU_SUPPORTED },
+ EMAIL_OPTIONS
{}
};
-@@ -1229,11 +1235,86 @@ static void drop_cred(void)
+@@ -1250,11 +1256,86 @@ static void drop_cred(void)
}
}
@@ -428,7 +428,7 @@
if (recordlen == 0) {
Wprintf("no data in mce record\n");
-@@ -1260,12 +1341,16 @@ static void process(int fd, unsigned rec
+@@ -1281,12 +1362,16 @@ static void process(int fd, unsigned rec
finish = 1;
if (!mce_filter(mce, recordlen))
continue;
@@ -445,7 +445,7 @@
flushlog();
}
-@@ -1374,6 +1459,8 @@ int main(int ac, char **av)
+@@ -1400,6 +1485,8 @@ int main(int ac, char **av)
noargs(ac, av);
fprintf(stderr, "mcelog %s\n", MCELOG_VERSION);
exit(0);
@@ -454,10 +454,10 @@
} else if (opt == 0)
break;
}
-@@ -1406,6 +1493,10 @@ int main(int ac, char **av)
- logfn = av[optind++];
- if (av[optind])
+@@ -1434,6 +1521,10 @@ int main(int ac, char **av)
usage();
+ exit(1);
+ }
+ if (email_mode == 0)
+ email_mode = email_env();
+ /* email sending only in daemon mode */
@@ -465,11 +465,11 @@
checkdmi();
general_setup();
-Index: mcelog-1.53/mcelog.h
+Index: mcelog-1.60/mcelog.h
===================================================================
---- mcelog-1.53.orig/mcelog.h
-+++ mcelog-1.53/mcelog.h
-@@ -141,6 +141,7 @@ enum cputype {
+--- mcelog-1.60.orig/mcelog.h 2018-09-24 15:06:48.769118480 +0200
++++ mcelog-1.60/mcelog.h 2018-09-24 15:07:38.908101010 +0200
+@@ -144,6 +144,7 @@ enum cputype {
enum option_ranges {
O_COMMON = 500,
O_DISKDB = 1000,
@@ -477,10 +477,10 @@
};
enum syslog_opt {
-Index: mcelog-1.53/msg.c
+Index: mcelog-1.60/msg.c
===================================================================
---- mcelog-1.53.orig/msg.c
-+++ mcelog-1.53/msg.c
+--- mcelog-1.60.orig/msg.c 2018-09-24 15:06:48.769118480 +0200
++++ mcelog-1.60/msg.c 2018-09-24 15:07:38.908101010 +0200
@@ -8,10 +8,13 @@
#include "mcelog.h"
#include "msg.h"
++++++ fix_setgroups_missing_call.patch ++++++
--- /var/tmp/diff_new_pack.ygvq8c/_old 2018-10-01 09:06:46.683822593 +0200
+++ /var/tmp/diff_new_pack.ygvq8c/_new 2018-10-01 09:06:46.683822593 +0200
@@ -1,7 +1,7 @@
-Index: mcelog-1.36/mcelog.c
+Index: mcelog-1.60/mcelog.c
===================================================================
---- mcelog-1.36.orig/mcelog.c 2016-05-03 17:45:47.832648501 +0200
-+++ mcelog-1.36/mcelog.c 2016-05-03 17:45:53.348962792 +0200
+--- mcelog-1.60.orig/mcelog.c 2018-09-24 15:15:35.668459814 +0200
++++ mcelog-1.60/mcelog.c 2018-09-24 15:15:41.648815524 +0200
@@ -37,6 +37,7 @@
#include <assert.h>
#include <signal.h>
@@ -10,7 +10,7 @@
#include <sys/wait.h>
#include <fnmatch.h>
#include "mcelog.h"
-@@ -1223,6 +1224,14 @@ static void general_setup(void)
+@@ -1247,6 +1248,14 @@ static void general_setup(void)
static void drop_cred(void)
{
++++++ mcelog-1.53.tar.xz -> mcelog-1.60.tar.xz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/LICENSE new/mcelog-1.60/LICENSE
--- old/mcelog-1.53/LICENSE 1970-01-01 01:00:00.000000000 +0100
+++ new/mcelog-1.60/LICENSE 2018-08-09 23:49:49.000000000 +0200
@@ -0,0 +1,339 @@
+ GNU GENERAL PUBLIC LICENSE
+ Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+ Preamble
+
+ The licenses for most software are designed to take away your
+freedom to share and change it. By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users. This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it. (Some other Free Software Foundation software is covered by
+the GNU Lesser General Public License instead.) You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price. Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+ To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+ For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have. You must make sure that they, too, receive or can get the
+source code. And you must show them these terms so they know their
+rights.
+
+ We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+ Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software. If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+ Finally, any free program is threatened constantly by software
+patents. We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary. To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+ GNU GENERAL PUBLIC LICENSE
+ TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+ 0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License. The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language. (Hereinafter, translation is included without limitation in
+the term "modification".) Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope. The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+ 1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+ 2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+ a) You must cause the modified files to carry prominent notices
+ stating that you changed the files and the date of any change.
+
+ b) You must cause any work that you distribute or publish, that in
+ whole or in part contains or is derived from the Program or any
+ part thereof, to be licensed as a whole at no charge to all third
+ parties under the terms of this License.
+
+ c) If the modified program normally reads commands interactively
+ when run, you must cause it, when started running for such
+ interactive use in the most ordinary way, to print or display an
+ announcement including an appropriate copyright notice and a
+ notice that there is no warranty (or else, saying that you provide
+ a warranty) and that users may redistribute the program under
+ these conditions, and telling the user how to view a copy of this
+ License. (Exception: if the Program itself is interactive but
+ does not normally print such an announcement, your work based on
+ the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole. If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works. But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+ 3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+ a) Accompany it with the complete corresponding machine-readable
+ source code, which must be distributed under the terms of Sections
+ 1 and 2 above on a medium customarily used for software interchange; or,
+
+ b) Accompany it with a written offer, valid for at least three
+ years, to give any third party, for a charge no more than your
+ cost of physically performing source distribution, a complete
+ machine-readable copy of the corresponding source code, to be
+ distributed under the terms of Sections 1 and 2 above on a medium
+ customarily used for software interchange; or,
+
+ c) Accompany it with the information you received as to the offer
+ to distribute corresponding source code. (This alternative is
+ allowed only for noncommercial distribution and only if you
+ received the program in object code or executable form with such
+ an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it. For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable. However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+ 4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License. Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+ 5. You are not required to accept this License, since you have not
+signed it. However, nothing else grants you permission to modify or
+distribute the Program or its derivative works. These actions are
+prohibited by law if you do not accept this License. Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+ 6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+ 7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License. If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all. For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices. Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+ 8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+ 9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time. Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number. If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation. If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+ 10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission. For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this. Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+ NO WARRANTY
+
+ 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+ 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+ END OF TERMS AND CONDITIONS
+
+ How to Apply These Terms to Your New Programs
+
+ If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+ To do so, attach the following notices to the program. It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+ <one line to give the program's name and a brief idea of what it does.>
+ Copyright (C) <year> <name of author>
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License along
+ with this program; if not, write to the Free Software Foundation, Inc.,
+ 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+ Gnomovision version 69, Copyright (C) year name of author
+ Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+ This is free software, and you are welcome to redistribute it
+ under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License. Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary. Here is a sample; alter the names:
+
+ Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+ `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+ <signature of Ty Coon>, 1 April 1989
+ Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs. If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library. If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/Makefile new/mcelog-1.60/Makefile
--- old/mcelog-1.53/Makefile 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/Makefile 2018-08-09 23:49:49.000000000 +0200
@@ -21,7 +21,9 @@
socket-memory-error-trigger \
bus-error-trigger \
iomca-error-trigger \
- unknown-error-trigger
+ unknown-error-trigger \
+ page-error-pre-sync-soft-trigger \
+ page-error-post-sync-soft-trigger
all: mcelog
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/README.md new/mcelog-1.60/README.md
--- old/mcelog-1.53/README.md 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/README.md 2018-08-09 23:49:49.000000000 +0200
@@ -10,7 +10,7 @@
for errors detected by the CPU.
For more details on what mcelog can do and the underlying theory
-see [mcelog.org](http://www.mcelog.org).
+see [mcelog.org](https://www.mcelog.org).
It is recommended that mcelog runs on all x86 machines, both 64bit
(since early 2.6) and 32bit (since 2.6.32).
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/bus.c new/mcelog-1.60/bus.c
--- old/mcelog-1.53/bus.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/bus.c 2018-08-09 23:49:49.000000000 +0200
@@ -82,7 +82,7 @@
env[ei] = NULL;
assert(ei < MAX_ENV);
- run_trigger(bus_trigger, NULL, env);
+ run_trigger(bus_trigger, NULL, env, false);
for (i = 0; i < ei; i++)
free(env[i]);
free(msg);
@@ -119,7 +119,7 @@
env[ei] = NULL;
assert(ei < MAX_ENV);
- run_trigger(iomca_trigger, NULL, env);
+ run_trigger(iomca_trigger, NULL, env, false);
for (i = 0; i < ei; i++)
free(env[i]);
free(msg);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/dimm.c new/mcelog-1.60/dimm.c
--- old/mcelog-1.53/dimm.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/dimm.c 2018-08-09 23:49:49.000000000 +0200
@@ -374,7 +374,7 @@
Lprintf("Large number of corrected errors in memory at
%s", loc);
Lprintf("Consider replacing it");
if (trigger && trigger[0])
- run_trigger(trigger, loc, val, max_error);
+ run_trigger(trigger, loc, val, max_error,
false);
}
}
free(devs);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/input/GENMCA new/mcelog-1.60/input/GENMCA
--- old/mcelog-1.53/input/GENMCA 1970-01-01 01:00:00.000000000 +0100
+++ new/mcelog-1.60/input/GENMCA 2018-08-09 23:49:49.000000000 +0200
@@ -0,0 +1,161 @@
+#!/bin/bash
+# ./GENMCA status [processor]
+SIMPLE=(
+ [0]="No Error"
+ [1]="Unclassified"
+ [2]="Microcode ROM parity error"
+ [3]="External error"
+ [4]="FRC error"
+ [5]="Internal parity error"
+ [6]="SMM Handler Code Access Violation"
+ )
+LL=( "Level-0" "Level-1" "Level-2" "Level-3" )
+TT=( "Instruction" "Data" "Generic" "Unknown" )
+mmm_mnemonic=( "GEN" "RD" "WR" "AC" "MS" "RES5" "RES6" "RES7" )
+RRRR=(
+ [0]="Generic"
+ [1]="Read"
+ [2]="Write"
+ [3]="Data-Read"
+ [4]="Data-Write"
+ [5]="Instruction-Fetch"
+ [6]="Prefetch"
+ [7]="Eviction"
+ [8]="Snoop"
+ )
+PP=(
+ [0]="Local-CPU-originated-request"
+ [1]="Responed-to-request"
+ [2]="Observed-error-as-third-party"
+ [3]="Generic"
+ )
+T=( "Request-did-not-timeout" "Request-timed-out" )
+
+II=( "Memory-access" "Reserved" "IO" "Other-transaction" )
+
+# generate the input files for 'mcelog --ascii'
+creat_file()
+{
+ echo "$1" > $mca_fname
+ echo "$2" >> $mca_fname
+ echo "$3" >> $mca_fname
+}
+
+simple_error()
+{
+ if [[ "$ecode" -le 6 ]]; then
+ echo "${SIMPLE[$ecode]}" > $mca_fexpect
+ elif [[ "$ecode" -eq 0x0400 ]]; then
+ echo "Internal Timer error" > $mca_fexpect
+ elif [[ "$ecode" -gt 0x0400 ]]; then
+ printf "Internal unclassified error: %x" $ecode > $mca_fexpect
+ fi
+}
+
+generic_cache_hierarchy()
+{
+ local levelnum=$(($ecode & 3))
+
+ echo "${LL[$levelnum]} Generic cache hierarchy error" > $mca_fexpect
+}
+
+tlb_errors()
+{
+ local levelnum=$(($ecode & 3))
+ local typenum=$(($ecode >> 2 & 3))
+
+ echo "${TT[$typenum]} TLB ${LL[$levelnum]} Error" > $mca_fexpect
+}
+
+memory_controller_errors()
+{
+ local chan=$(($ecode & 0xf))
+ local mmm_num=$(($ecode >> 4 & 7))
+
+ if [[ "$chan" -eq 0xf ]]; then
+ chan="unspecified"
+ else
+ chan=$(printf "%u" $chan)
+ fi
+ echo "MEMORY CONTROLLER ${mmm_mnemonic[mmm_num]}_CHANNEL${chan}_ERR" >
$mca_fexpect
+}
+
+cache_hierarchy_errors()
+{
+ local levelnum=$(($ecode & 3))
+ local typenum=$(($ecode >> 2 & 3))
+ local rrrr_num=$(($ecode >> 4 & 0xf))
+ local rrrr_str
+
+ if [[ "$rrrr_num" -gt 8 ]]; then
+ rrrr_str="UNKNOWN"
+ else
+ rrrr_str="${RRRR[$rrrr_num]}"
+ fi
+ echo "${TT[$typenum]} CACHE ${LL[$levelnum]} ${rrrr_str} Error" >
$mca_fexpect
+}
+
+bus_and_interconnect_errors()
+{
+ local levelnum=$(($ecode & 3))
+ local ii_num=$(($ecode >> 2 & 3))
+ local rrrr_num=$(($ecode >> 4 & 0xf))
+ local rrrr_str
+ local t_num=$(($ecode >> 8 & 1))
+ local pp_num=$(($ecode >> 9 & 3))
+
+ if [[ "$rrrr_num" -gt 8 ]]; then
+ rrrr_str="UNKNOWN"
+ else
+ rrrr_str="${RRRR[$rrrr_num]}"
+ fi
+ echo "${LL[$levelnum]} ${PP[$pp_num]} ${rrrr_str} ${II[ii_num]}
${T[t_num]}" > $mca_fexpect
+}
+
+usage()
+{
+echo "Usage: ${0##*/} status [processor]"
+echo -e "\tstatus --- the 64-bit IA32_MCi_Status value, i.e.,
0x8000000000000002."
+echo -e "\tprocessor --- the format of 'processor' is 'vendor:CPUID',
vendor: 0 - Intel,"
+echo -e "\t i.e., 0:0x50650 ."
+ exit 1
+}
+
+complain()
+{
+ echo "Unknown MCA error code"
+ exit 2
+}
+
+if [ "x$1" = "x" ]; then
+ usage
+fi
+
+cpu_clause="CPU 0 1"
+status_clause=$(printf "STATUS 0x%lx" $1)
+proc_str=${2:-"0:0x50650"}
+proc_clause="PROCESSOR ${proc_str}"
+ecode=$(($1 & 0xffff))
+# input file for 'mcelog --ascii'
+mca_fname=$(printf "mca-%x" $ecode)
+# file for saving the expected string parsed from
+# raw MCA error codes.
+mca_fexpect=${mca_fname}-expect
+
+# mask F bit in MCA error code
+if [[ "$ecode" -ge 0x1000 ]]; then
+ ecode=$(($ecode & ~0x1000))
+fi
+if [[ "$ecode" -ge 0x0000 && "$ecode" -lt 0x0007 ]]; then simple_error
+elif [[ "$ecode" -ge 0x0007 && "$ecode" -lt 0x000c ]]; then complain
+elif [[ "$ecode" -ge 0x000c && "$ecode" -lt 0x0010 ]]; then
generic_cache_hierarchy
+elif [[ "$ecode" -ge 0x0010 && "$ecode" -lt 0x0020 ]]; then tlb_errors
+elif [[ "$ecode" -ge 0x0020 && "$ecode" -lt 0x0080 ]]; then complain
+elif [[ "$ecode" -ge 0x0080 && "$ecode" -lt 0x0100 ]]; then
memory_controller_errors
+elif [[ "$ecode" -ge 0x0100 && "$ecode" -lt 0x0200 ]]; then
cache_hierarchy_errors
+elif [[ "$ecode" -ge 0x0200 && "$ecode" -lt 0x0400 ]]; then complain
+elif [[ "$ecode" -ge 0x0400 && "$ecode" -lt 0x0800 ]]; then simple_error
+elif [[ "$ecode" -ge 0x0800 && "$ecode" -lt 0x1000 ]]; then
bus_and_interconnect_errors
+fi
+
+creat_file "$cpu_clause" "$proc_clause" "$status_clause"
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/leaky-bucket.h
new/mcelog-1.60/leaky-bucket.h
--- old/mcelog-1.53/leaky-bucket.h 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/leaky-bucket.h 2018-08-09 23:49:49.000000000 +0200
@@ -2,6 +2,7 @@
#define LEAKY_BUCKET_H 1
#include <time.h>
+#include <stdbool.h>
/* Leaky bucket algorithm for triggers */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/mcelog.8 new/mcelog-1.60/mcelog.8
--- old/mcelog-1.53/mcelog.8 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/mcelog.8 2018-08-09 23:49:49.000000000 +0200
@@ -36,10 +36,10 @@
errors is usually not a cause for worry, but a large number can indicate
future failure.
-When a corrected or recovered error happens the x86 kernel writes a record
describing
+When a corrected or recovered error happens, the x86 kernel writes a record
describing
the MCE into a internal ring buffer available through the
.I /dev/mcelog
-device
+device.
.I mcelog
retrieves errors from
.I /dev/mcelog,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/mcelog.c new/mcelog-1.60/mcelog.c
--- old/mcelog-1.53/mcelog.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/mcelog.c 2018-08-09 23:49:49.000000000 +0200
@@ -107,6 +107,9 @@
/* add more extended banks here */
+ case MCE_APEI_BANK:
+ return "ACPI/APEI reported error";
+
default:
sprintf(buf, "Undecoded extended event %x", bank);
return buf;
@@ -436,19 +439,22 @@
/* decode all status bits here */
Wprintf("STATUS %llx MCGSTATUS %llx\n", m->status, m->mcgstatus);
n = 0;
- if (recordlen >= offsetof(struct mce, cpuid) && m->mcgcap)
+ if (recordlen > offsetof(struct mce, cpuid) && m->mcgcap)
n += Wprintf("MCGCAP %llx ", m->mcgcap);
- if (recordlen >= offsetof(struct mce, apicid))
+ if (recordlen > offsetof(struct mce, apicid))
n += Wprintf("APICID %x ", m->apicid);
- if (recordlen >= offsetof(struct mce, socketid))
+ if (recordlen > offsetof(struct mce, socketid))
n += Wprintf("SOCKETID %x ", m->socketid);
if (n > 0)
Wprintf("\n");
- if (recordlen >= offsetof(struct mce, ppin) && m->ppin)
+ if (recordlen > offsetof(struct mce, ppin) && m->ppin)
n += Wprintf("PPIN %llx\n", m->ppin);
- if (recordlen >= offsetof(struct mce, cpuid) && m->cpuid) {
+ if (recordlen > offsetof(struct mce, microcode) && m->microcode)
+ n += Wprintf("MICROCODE %x\n", m->microcode);
+
+ if (recordlen > offsetof(struct mce, cpuid) && m->cpuid) {
u32 fam, mod;
parse_cpuid(m->cpuid, &fam, &mod);
Wprintf("CPUID Vendor %s Family %u Model %u\n",
@@ -478,10 +484,10 @@
Wprintf("ADDR %#llx\n", m->addr);
Wprintf("STATUS %#llx\n", m->status);
Wprintf("MCGSTATUS %#llx\n", m->mcgstatus);
- if (recordlen >= offsetof(struct mce, cpuid))
+ if (recordlen > offsetof(struct mce, cpuid))
Wprintf("PROCESSOR %u:%#x\n", m->cpuvendor, m->cpuid);
#define CPRINT(str, field) \
- if (recordlen >= offsetof(struct mce, field)) \
+ if (recordlen > offsetof(struct mce, field)) \
Wprintf(str "\n", m->field)
CPRINT("TIME %llu", time);
CPRINT("SOCKETID %u", socketid);
@@ -716,7 +722,7 @@
if (!strncmp(s, "CPU ", 4)) {
unsigned cpu = 0, bank = 0;
n = sscanf(s,
- "CPU %u: Machine Check Exception: %16Lx Bank %d: %016Lx%n",
+ "CPU %u: Machine Check%*[ :Ec-x]%16Lx Bank %d: %016Lx%n",
&cpu,
&m.mcgstatus,
&bank,
@@ -982,10 +988,10 @@
"--pidfile file Write pid of daemon into file\n"
"--no-imc-log Disable extended iMC logging\n"
"--is-cpu-supported Exit with return code indicating whether the CPU is
supported\n"
+"--help Display this message.\n"
);
printf("\n");
print_cputypes();
- exit(1);
}
enum options {
@@ -1017,6 +1023,7 @@
O_DEBUG_NUMERRORS,
O_NO_IMC_LOG,
O_IS_CPU_SUPPORTED,
+ O_HELP,
};
static struct option options[] = {
@@ -1050,6 +1057,7 @@
{ "pidfile", 1, NULL, O_PIDFILE },
{ "debug-numerrors", 0, NULL, O_DEBUG_NUMERRORS }, /* undocumented: for
testing */
{ "no-imc-log", 0, NULL, O_NO_IMC_LOG },
+ { "help", 0, NULL, O_HELP },
{ "is-cpu-supported", 0, NULL, O_IS_CPU_SUPPORTED },
{}
};
@@ -1080,12 +1088,15 @@
break;
case O_INTEL_CPU: {
unsigned fam, mod;
- if (sscanf(optarg, "%i,%i", &fam, &mod) != 2)
+ if (sscanf(optarg, "%i,%i", &fam, &mod) != 2) {
usage();
+ exit(1);
+ }
cputype = select_intel_cputype(fam, mod);
if (cputype == CPU_GENERIC) {
fprintf(stderr, "Unknown Intel CPU\n");
usage();
+ exit(1);
}
cpu_forced = 1;
break;
@@ -1104,8 +1115,10 @@
do_dmi = 0;
break;
case O_DMI_VERBOSE:
- if (sscanf(optarg, "%i", &v) != 1)
+ if (sscanf(optarg, "%i", &v) != 1) {
usage();
+ exit(1);
+ }
dmi_set_verbosity(v);
break;
case O_SYSLOG:
@@ -1117,8 +1130,10 @@
break;
case O_CPUMHZ:
cpumhz_forced = 1;
- if (sscanf(optarg, "%lf", &cpumhz) != 1)
+ if (sscanf(optarg, "%lf", &cpumhz) != 1) {
usage();
+ exit(1);
+ }
break;
case O_SYSLOG_ERROR:
syslog_level = LOG_ERR;
@@ -1155,6 +1170,10 @@
case O_IS_CPU_SUPPORTED:
check_only = 1;
break;
+ case O_HELP:
+ usage();
+ exit(0);
+ break;
case 0:
break;
default:
@@ -1184,8 +1203,10 @@
int opt;
while ((opt = getopt_long(ac, av, "", options, NULL)) != -1) {
- if (modifier(opt) != 1)
+ if (modifier(opt) != 1) {
usage();
+ exit(1);
+ }
}
}
@@ -1284,16 +1305,20 @@
static void noargs(int ac, char **av)
{
- if (getopt_long(ac, av, "", options, NULL) != -1)
+ if (getopt_long(ac, av, "", options, NULL) != -1) {
usage();
+ exit(1);
+ }
}
static void parse_config(char **av)
{
static const char config_fn[] = CONFIG_FILENAME;
const char *fn = config_file(av, config_fn);
- if (!fn)
+ if (!fn) {
usage();
+ exit(1);
+ }
if (parse_config_file(fn) < 0) {
/* If it's the default file don't complain if it isn't there */
if (fn != config_fn) {
@@ -1362,6 +1387,7 @@
while ((opt = getopt_long(ac, av, "", options, NULL)) != -1) {
if (opt == '?') {
usage();
+ exit(1);
} else if (combined_modifier(opt) > 0) {
continue;
} else if (opt == O_ASCII) {
@@ -1404,8 +1430,10 @@
modifier_finish();
if (av[optind])
logfn = av[optind++];
- if (av[optind])
+ if (av[optind]) {
usage();
+ exit(1);
+ }
checkdmi();
general_setup();
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/mcelog.conf new/mcelog-1.60/mcelog.conf
--- old/mcelog-1.53/mcelog.conf 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/mcelog.conf 2018-08-09 23:49:49.000000000 +0200
@@ -174,6 +174,14 @@
#memory-ce-action = off|account|soft|hard|soft-then-hard
memory-ce-action = soft
+# Trigger script before doing soft memory offline
+# this trigger will scan and run all the scipts in the
page-error-pre-soft-trigger.extern
+memory-pre-sync-soft-ce-trigger = page-error-pre-sync-soft-trigger
+
+# Trigger script after completing soft memory offline
+# this trigger will scan and run all the scipts in the
page-error-post-soft-trigger.extern
+memory-post-sync-soft-ce-trigger = page-error-post-sync-soft-trigger
+
[trigger]
# Maximum number of running triggers
children-max = 2
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/mcelog.conf.5
new/mcelog-1.60/mcelog.conf.5
--- old/mcelog-1.53/mcelog.conf.5 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/mcelog.conf.5 2018-08-09 23:49:49.000000000 +0200
@@ -1,5 +1,5 @@
-." Auto generated mcelog.conf manpage. Do not edit.
+.\" Auto generated mcelog.conf manpage. Do not edit.
.TH "mcelog.conf" 5 "mcelog"
.SH NAME
@@ -8,12 +8,11 @@
.B /etc/mcelog.conf
.SH DESCRIPTION
-/etc/mcelog.conf is the main configuration file for
+/etc/mcelog.conf is the main configuration file for
.B mcelog(8).
-This is configuration file separated into sections including
+This is configuration file separated into sections including
a default section.
-
General format
.PP
.B optionname = value
@@ -266,6 +265,18 @@
.B memory-ce-action = soft
.PP
.PP
+Trigger script before doing soft memory offline
+this trigger will scan and run all the scipts in the
page-error-pre-soft-trigger.extern
+.PP
+.B memory-pre-sync-soft-ce-trigger = page-error-pre-sync-soft-trigger
+.PP
+.PP
+Trigger script after completing soft memory offline
+this trigger will scan and run all the scipts in the
page-error-post-soft-trigger.extern
+.PP
+.B memory-post-sync-soft-ce-trigger = page-error-post-sync-soft-trigger
+.PP
+.PP
.SS "The trigger config section"
Maximum number of running triggers
.PP
@@ -277,7 +288,7 @@
.PP
.SH SEE ALSO
-.BR mcelog (8)
-,
+.BR mcelog (8),
+.BR mcelog.triggers (5)
.B http://www.mcelog.org
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/mcelog.h new/mcelog-1.60/mcelog.h
--- old/mcelog-1.53/mcelog.h 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/mcelog.h 2018-08-09 23:49:49.000000000 +0200
@@ -34,6 +34,7 @@
__u64 synd; /* MCA_SYND MSR: only valid on SMCA systems */
__u64 ipid; /* MCA_IPID MSR: only valid on SMCA systems */
__u64 ppin; /* Protected Processor Inventory Number */
+ __u32 microcode;/* Microcode revision */
};
#define X86_VENDOR_INTEL 0
@@ -57,6 +58,8 @@
#define MCE_THERMAL_BANK (MCE_EXTENDED_BANK + 0)
#define MCE_TIMEOUT_BANK (MCE_EXTENDED_BANK + 90)
+#define MCE_APEI_BANK 255
+
#define MCI_THRESHOLD_OVER (1ULL<<48) /* threshold error count overflow */
#define MCI_STATUS_VAL (1ULL<<63) /* valid error */
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/memdb.c new/mcelog-1.60/memdb.c
--- old/mcelog-1.53/memdb.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/memdb.c 2018-08-09 23:49:49.000000000 +0200
@@ -132,7 +132,7 @@
/* Run a user defined trigger when a error threshold is crossed. */
void memdb_trigger(char *msg, struct memdimm *md, time_t t,
- struct err_type *et, struct bucket_conf *bc)
+ struct err_type *et, struct bucket_conf *bc, char *args[], bool
sync)
{
struct leaky_bucket *bucket = &et->bucket;
char *env[MAX_ENV];
@@ -172,7 +172,7 @@
xasprintf(&env[ei++], "THRESHOLD_COUNT=%d", bucket->count);
env[ei] = NULL;
assert(ei < MAX_ENV);
- run_trigger(bc->trigger, NULL, env);
+ run_trigger(bc->trigger, args, env, sync);
for (i = 0; i < ei; i++)
free(env[i]);
out:
@@ -194,7 +194,7 @@
char *msg;
xasprintf(&msg, "Fallback %s memory error count %d
exceeded threshold",
t->type, corr_err_cnt);
- memdb_trigger(msg, md, 0, &md->ce, &t->ce_bucket_conf);
+ memdb_trigger(msg, md, 0, &md->ce, &t->ce_bucket_conf,
NULL, false);
free(msg);
}
}
@@ -211,11 +211,11 @@
if (m->status & MCI_STATUS_UC) {
md->uc.count++;
if (__bucket_account(&t->uc_bucket_conf, &md->uc.bucket, 1,
m->time))
- memdb_trigger(msg, md, m->time, &md->uc,
&t->uc_bucket_conf);
+ memdb_trigger(msg, md, m->time, &md->uc,
&t->uc_bucket_conf, NULL, false);
} else {
md->ce.count++;
if (__bucket_account(&t->ce_bucket_conf, &md->ce.bucket, 1,
m->time))
- memdb_trigger(msg, md, m->time, &md->ce,
&t->ce_bucket_conf);
+ memdb_trigger(msg, md, m->time, &md->ce,
&t->ce_bucket_conf, NULL, false);
}
free(msg);
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/memdb.h new/mcelog-1.60/memdb.h
--- old/mcelog-1.53/memdb.h 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/memdb.h 2018-08-09 23:49:49.000000000 +0200
@@ -20,5 +20,5 @@
struct memdimm;
void memdb_trigger(char *msg, struct memdimm *md, time_t t,
- struct err_type *et, struct bucket_conf *bc);
+ struct err_type *et, struct bucket_conf *bc, char *argv[],
bool sync);
struct memdimm *get_memdimm(int socketid, int channel, int dimm, int insert);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/page.c new/mcelog-1.60/page.c
--- old/mcelog-1.53/page.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/page.c 2018-08-09 23:49:49.000000000 +0200
@@ -30,6 +30,7 @@
#include <errno.h>
#include <string.h>
#include "memutil.h"
+#include "trigger.h"
#include "mcelog.h"
#include "rbtree.h"
#include "leaky-bucket.h"
@@ -55,6 +56,7 @@
static struct rb_root mempage_root;
static struct bucket_conf page_trigger_conf;
+static char *page_error_pre_soft_trigger, *page_error_post_soft_trigger;
static const char *page_state[] = {
[PAGE_ONLINE] = "online",
@@ -218,10 +220,43 @@
xasprintf(&msg, "Corrected memory errors on page %llx exceed
threshold %s",
addr, thresh);
free(thresh);
- memdb_trigger(msg, md, t, &mp->ce, &page_trigger_conf);
+ memdb_trigger(msg, md, t, &mp->ce, &page_trigger_conf, NULL,
false);
free(msg);
mp->triggered = 1;
- offline_action(mp, addr);
+
+ if (offline == OFFLINE_SOFT || offline ==
OFFLINE_SOFT_THEN_HARD) {
+ struct bucket_conf page_soft_trigger_conf;
+ char *argv[] = {
+ NULL,
+ NULL,
+ NULL,
+ };
+ char *args;
+
+ asprintf(&args, "%lld", addr);
+ argv[0]=args;
+
+ memcpy(&page_soft_trigger_conf, &page_trigger_conf,
sizeof(struct bucket_conf));
+ page_soft_trigger_conf.trigger =
page_error_pre_soft_trigger;
+ argv[0]=page_error_pre_soft_trigger;
+ argv[1]=args;
+ asprintf(&msg, "pre soft trigger run for page %lld",
addr);
+ memdb_trigger(msg, md, t, &mp->ce,
&page_soft_trigger_conf, argv, true);
+ free(msg);
+
+ offline_action(mp, addr);
+
+ memcpy(&page_soft_trigger_conf, &page_trigger_conf,
sizeof(struct bucket_conf));
+ page_soft_trigger_conf.trigger =
page_error_post_soft_trigger;
+ argv[0]=page_error_post_soft_trigger;
+ argv[1]=args;
+ asprintf(&msg, "post soft trigger run for page %lld",
addr);
+ memdb_trigger(msg, md, t, &mp->ce,
&page_soft_trigger_conf, argv, true);
+ free(msg);
+ free(args);
+
+ } else
+ offline_action(mp, addr);
}
}
@@ -262,4 +297,19 @@
Lprintf("Kernel does not support page offline interface\n");
offline = OFFLINE_ACCOUNT;
}
+
+ page_error_pre_soft_trigger = config_string("page",
"memory-pre-sync-soft-ce-trigger");
+
+ if (page_error_pre_soft_trigger &&
trigger_check(page_error_pre_soft_trigger) < 0) {
+ SYSERRprintf("Cannot access page soft pre trigger `%s'",
+ page_error_pre_soft_trigger);
+ exit(1);
+ }
+
+ page_error_post_soft_trigger= config_string("page",
"memory-post-sync-soft-ce-trigger");
+ if (page_error_post_soft_trigger &&
trigger_check(page_error_post_soft_trigger) < 0) {
+ SYSERRprintf("Cannot access page soft post trigger `%s'",
+ page_error_post_soft_trigger);
+ exit(1);
+ }
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/rbtree.h new/mcelog-1.60/rbtree.h
--- old/mcelog-1.53/rbtree.h 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/rbtree.h 2018-08-09 23:49:49.000000000 +0200
@@ -107,7 +107,7 @@
#define RB_BLACK 1
struct rb_node *rb_right;
struct rb_node *rb_left;
- unsigned char rb_parent_color;
+ unsigned long rb_parent_color;
} __attribute__((packed));
struct rb_root
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/skylake_xeon.c
new/mcelog-1.60/skylake_xeon.c
--- old/mcelog-1.53/skylake_xeon.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/skylake_xeon.c 2018-08-09 23:49:49.000000000 +0200
@@ -79,7 +79,7 @@
/* See IA32 SDM Vol3B Table 16-28 */
-static char *qpi[] = {
+static char *upi[] = {
[0x00] = "UC Phy Initialization Failure",
[0x01] = "UC Phy detected drift buffer alarm",
[0x02] = "UC Phy detected latency buffer rollover",
@@ -98,13 +98,13 @@
[0x31] = "COR LL Rx detected CRC error - successful LLR with Phy
Reinit",
};
-static struct field qpi_mc[] = {
- FIELD(16, qpi),
+static struct field upi_mc[] = {
+ FIELD(16, upi),
{}
};
/* These apply to MSCOD 0x12 "UC LL or Phy control error" */
-static struct field qpi_0x12[] = {
+static struct field upi_0x12[] = {
SBITFIELD(22, "Phy Control Error"),
SBITFIELD(23, "Unexpected Retry.Ack flit"),
SBITFIELD(24, "Unexpected Retry.Req flit"),
@@ -194,10 +194,10 @@
case 5:
case 12:
case 19:
- Wprintf("QPI: ");
- decode_bitfield(status, qpi_mc);
+ Wprintf("UPI: ");
+ decode_bitfield(status, upi_mc);
if (EXTRACT(status, 16, 21) == 0x12)
- decode_bitfield(status, qpi_0x12);
+ decode_bitfield(status, upi_0x12);
break;
case 7: case 8:
Wprintf("M2M: ");
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/tests/Makefile
new/mcelog-1.60/tests/Makefile
--- old/mcelog-1.53/tests/Makefile 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/tests/Makefile 2018-08-09 23:49:49.000000000 +0200
@@ -10,6 +10,7 @@
./test pfa "${DEBUG}"
./test unknown "${DEBUG}"
./test server "${DEBUG}"
+ ./mcaerr_test -a
clean:
rm -f */*log
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/tests/mcaerr_test
new/mcelog-1.60/tests/mcaerr_test
--- old/mcelog-1.53/tests/mcaerr_test 1970-01-01 01:00:00.000000000 +0100
+++ new/mcelog-1.60/tests/mcaerr_test 2018-08-09 23:49:49.000000000 +0200
@@ -0,0 +1,177 @@
+#!/bin/bash
+# MCA error codes validation
+# ./mcaerr_test -a [-b status] [-p processor]
+# ./mcaerr_test -s status [-p processor]
+
+g_testall=0
+g_processor=""
+g_hstat=0x8000000000000000
+g_status=""
+g_tests_dir="$(cd "$(dirname "$0")" && pwd)"
+g_input_dir=$g_tests_dir/../input
+g_tmp_dir=/tmp/mcaerr-tmp
+# save failed MCA error codes during testing
+g_fail_code_log=$g_tests_dir/fail_mcacode_log
+# save undefined MCA error codes during testing
+g_unknown_code_log=$g_tests_dir/unknown_mcacode_log
+# input file for 'mcelog --ascii'
+g_fname=""
+# the expected string parsed from raw MCA error codes.
+g_expect=""
+
+logfile_prepare()
+{
+ if [ -f $g_fail_code_log ]; then
+ : > $g_fail_code_log
+ else
+ touch $g_fail_code_log
+ fi
+
+ if [ -f $g_unknown_code_log ]; then
+ : > $g_unknown_code_log
+ else
+ touch $g_unknown_code_log
+ fi
+}
+
+validate_mca()
+{
+ local mca_prefix="MCA:"
+ local m_ecode=$1
+ local buserr_expect
+
+ # masked F bit in MCA error code
+ if [[ "$1" -ge 0x1000 ]]; then
+ m_ecode=$(($1 & ~0x1000))
+ fi
+
+ g_fname=$(printf "mca-%0x" $1)
+ g_expect=$(cat ./${g_fname}-expect)
+ if [[ "$m_ecode" -ge 0x0800 && "$m_ecode" -lt 0x1000 ]]; then
+ mca_prefix="MCA: BUS error:"
+ buserr_expect="BUS error: $g_expect"
+ echo "expect: $buserr_expect"
+ else
+ echo "expect: $g_expect"
+ fi
+ if mcelog --no-dmi --ascii --file $g_fname | grep "$mca_prefix" | grep
-q "$g_expect" ; then
+ return 0
+ else
+ return 1
+ fi
+}
+
+test_all()
+{
+ local m_status
+ local rc
+ local fail_cnt=0
+ local pass_cnt=0
+ local ignore_cnt=0
+
+ if [ ! -d $g_tmp_dir ]; then
+ mkdir $g_tmp_dir
+ fi
+ pushd ./ > /dev/null
+ cd $g_tmp_dir
+ echo "++++++++++Start validating all MCA error codes...++++++++++"
+ for ecode in `seq 0x0000 0x0fff`
+ do
+ m_status=$(($g_hstat | $ecode))
+ printf "m_status=0x%lx\n" $m_status
+ $g_input_dir/GENMCA $m_status "$g_processor"
+ case $? in
+ 0)
+ validate_mca $ecode
+ rc=$?
+ if [ $rc -eq 0 ]; then
+ printf "code 0x%x: [PASS]\n" $ecode
+ let "pass_cnt += 1"
+ else
+ printf "code 0x%x: [FAIL]\n" $ecode | tee -a
$g_fail_code_log
+ let "fail_cnt += 1"
+ fi
+ ;;
+ 2)
+ printf "code 0x%x: [IGNORE]\n" $ecode | tee -a
$g_unknown_code_log
+ let "ignore_cnt += 1"
+ ;;
+ *)
+ echo "It won't go here!"
+ exit 1
+ ;;
+ esac
+
+ done
+ echo "++++++++++End validating all MCA error codes++++++++++"
+ printf "PASS: %d, FAIL: %d, IGNORE: %d\n" $pass_cnt $fail_cnt
$ignore_cnt
+ popd > /dev/null
+ rm -rf $g_tmp_dir
+}
+
+test_one()
+{
+ local m_ecode
+ local rc
+
+ [ -z "$g_status" ] && usage
+ m_ecode=$(($g_status & 0xffff))
+ $g_input_dir/GENMCA $g_status "$g_processor"
+ case $? in
+ 0)
+ validate_mca $m_ecode
+ rc=$?
+ if [ $rc -eq 0 ]; then
+ printf "code 0x%x: [PASS]\n" $m_ecode
+ else
+ printf "code 0x%x: [FAIL]\n" $m_ecode
+ fi
+ echo "Content of the generated input_file lists below:"
+ cat $g_fname
+ rm -rf $g_fname
+ rm -rf ${g_fname}-expect
+ ;;
+ 2)
+ printf "code %x: [IGNORE]\n" $m_ecode
+ ;;
+ *)
+ echo "It won't go here!"
+ exit 1
+ ;;
+ esac
+}
+
+usage()
+{
+echo "Usage:"
+echo -e "\t${0##*/} -a [-b status] [-p processor]"
+echo -e "\t${0##*/} -s status [-p processor]"
+echo -e "\t\t-a --- do all MCA error codes validation"
+echo -e "\t\t-b --- 'status' is same as the '-s' option, but the lowest 16
bits are masked."
+echo -e "\t\t-s --- only run MCA error codes test related to 'status' value,"
+echo -e "\t\t 'status' is the 64-bit IA32_MCi_Status value, i.e.,
0x8000000000000002."
+echo -e "\t\t-p --- modify 'PROCESSOR' part of the tested input file with
'processor' value,"
+echo -e "\t\t 'processor' must be formated as 'vendor:CPUID', vendor:0 -
Intel,"
+echo -e "\t\t i.e., 0:0x50650, the default value."
+ exit 1
+}
+
+[ "x$1" == "x" ] && usage
+while getopts ":ab:hp:s:" opt
+do
+ case $opt in
+ a) g_testall=1;;
+ b) g_hstat=$(($OPTARG & ~0xffff));;
+ h) usage;;
+ p) g_processor="$OPTARG";;
+ s) g_status=$OPTARG;;
+ *) usage;;
+ esac
+done
+
+if [ "$g_testall" == "1" ]; then
+ logfile_prepare
+ test_all
+else
+ test_one
+fi
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/trigger.c new/mcelog-1.60/trigger.c
--- old/mcelog-1.53/trigger.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/trigger.c 2018-08-09 23:49:49.000000000 +0200
@@ -20,6 +20,7 @@
#include <unistd.h>
#include <stdlib.h>
#include <signal.h>
+#include <stdbool.h>
#include <string.h>
#include <sys/wait.h>
#include "trigger.h"
@@ -40,6 +41,8 @@
static int children_max = 4;
static char *trigger_dir;
+static void finish_child(pid_t child, int status);
+
pid_t mcelog_fork(const char *name)
{
pid_t child;
@@ -58,9 +61,10 @@
}
// note: trigger must be allocated, e.g. from config
-void run_trigger(char *trigger, char *argv[], char **env)
+void run_trigger(char *trigger, char *argv[], char **env, bool sync)
{
pid_t child;
+
char *fallback_argv[] = {
trigger,
NULL,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/trigger.h new/mcelog-1.60/trigger.h
--- old/mcelog-1.53/trigger.h 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/trigger.h 2018-08-09 23:49:49.000000000 +0200
@@ -1,5 +1,11 @@
-void run_trigger(char *trigger, char *argv[], char **env);
+#ifndef __TRIGGER_H__
+#define __TRIGGER_H__
+
+#include <stdbool.h>
+void run_trigger(char *trigger, char *argv[], char **env, bool sync);
void trigger_setup(void);
void trigger_wait(void);
int trigger_check(char *);
pid_t mcelog_fork(const char *thread_name);
+
+#endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/mcelog-1.53/triggers/page-error-post-sync-soft-trigger
new/mcelog-1.60/triggers/page-error-post-sync-soft-trigger
--- old/mcelog-1.53/triggers/page-error-post-sync-soft-trigger 1970-01-01
01:00:00.000000000 +0100
+++ new/mcelog-1.60/triggers/page-error-post-sync-soft-trigger 2018-08-09
23:49:49.000000000 +0200
@@ -0,0 +1,40 @@
+#!/bin/sh
+# This shell script can be executed by mcelog in daemon mode when a page
+# in memory exceeds a pre-configured corrected error threshold.
+# mcelog internally also supports offlining the page through the kernel.
+#
+# environment:
+# THRESHOLD human readable threshold status
+# MESSAGE Human readable consolidated error message
+# TOTALCOUNT total count of errors for current DIMM of CE/UC depending on
+# what triggered the event
+# LOCATION Consolidated location as a single string
+# DMI_LOCATION DIMM location from DMI/SMBIOS if available
+# DMI_NAME DIMM identifier from DMI/SMBIOS if available
+# DIMM DIMM number reported by hardware
+# CHANNEL Channel number reported by hardware
+# SOCKETID Socket ID of CPU that includes the memory controller with the
DIMM
+# CECOUNT Total corrected error count for DIMM
+# UCCOUNT Total uncorrected error count for DIMM
+# LASTEVENT Time stamp of event that triggered threshold (in time_t format,
seconds)
+# THRESHOLD_COUNT Total umber of events in current threshold time period of
specific type
+# ARGUMENTS:$1 the page address of soft offline
+#
+# note: will run as mcelog configured user
+# this can be changed in mcelog.conf
+
+logger -s -p daemon.err -t mcelog "$MESSAGE"
+logger -s -p daemon.err -t mcelog "Location: $LOCATION"
+
+[ -x ./page-error-post-sync-soft-trigger.local ] && .
./page-error-post-sync-soft-trigger.local $1
+
+if [ -d page-error-post-sync-soft-trigger.extern ]
+then
+ ls page-error-post-sync-soft-trigger.extern |
+ while read item
+ do
+ [ -x ./page-error-post-sync-soft-trigger.extern/$item ] && .
./page-error-post-sync-soft-trigger.extern/$item $1
+ done
+fi
+
+exit 0
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/mcelog-1.53/triggers/page-error-pre-sync-soft-trigger
new/mcelog-1.60/triggers/page-error-pre-sync-soft-trigger
--- old/mcelog-1.53/triggers/page-error-pre-sync-soft-trigger 1970-01-01
01:00:00.000000000 +0100
+++ new/mcelog-1.60/triggers/page-error-pre-sync-soft-trigger 2018-08-09
23:49:49.000000000 +0200
@@ -0,0 +1,40 @@
+#!/bin/sh
+# This shell script can be executed by mcelog in daemon mode when a page
+# in memory exceeds a pre-configured corrected error threshold.
+# mcelog internally also supports offlining the page through the kernel.
+#
+# environment:
+# THRESHOLD human readable threshold status
+# MESSAGE Human readable consolidated error message
+# TOTALCOUNT total count of errors for current DIMM of CE/UC depending on
+# what triggered the event
+# LOCATION Consolidated location as a single string
+# DMI_LOCATION DIMM location from DMI/SMBIOS if available
+# DMI_NAME DIMM identifier from DMI/SMBIOS if available
+# DIMM DIMM number reported by hardware
+# CHANNEL Channel number reported by hardware
+# SOCKETID Socket ID of CPU that includes the memory controller with the
DIMM
+# CECOUNT Total corrected error count for DIMM
+# UCCOUNT Total uncorrected error count for DIMM
+# LASTEVENT Time stamp of event that triggered threshold (in time_t format,
seconds)
+# THRESHOLD_COUNT Total umber of events in current threshold time period of
specific type
+# ARGUMENTS:$1 the page address of soft offline
+#
+# note: will run as mcelog configured user
+# this can be changed in mcelog.conf
+
+logger -s -p daemon.err -t mcelog "$MESSAGE"
+logger -s -p daemon.err -t mcelog "Location: $LOCATION"
+
+[ -x ./page-error-pre-soft-trigger.local ] && .
./page-error-pre-soft-trigger.local $1
+
+if [ -d page-error-pre-sync-soft-trigger.extern ]
+then
+ ls page-error-pre-sync-soft-trigger.extern |
+ while read item
+ do
+ [ -x ./page-error-pre-sync-soft-trigger.extern/$item ] && .
./page-error-pre-sync-soft-trigger.extern/$item $1
+ done
+fi
+
+exit 0
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/unknown.c new/mcelog-1.60/unknown.c
--- old/mcelog-1.53/unknown.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/unknown.c 2018-08-09 23:49:49.000000000 +0200
@@ -73,7 +73,7 @@
env[ei] = NULL;
assert(ei < MAX_ENV);
- run_trigger(unknown_trigger, NULL, env);
+ run_trigger(unknown_trigger, NULL, env, false);
for (i = 0; i < ei; i++)
free(env[i]);
free(msg);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/mcelog-1.53/yellow.c new/mcelog-1.60/yellow.c
--- old/mcelog-1.53/yellow.c 2017-06-11 20:52:26.000000000 +0200
+++ new/mcelog-1.60/yellow.c 2018-08-09 23:49:49.000000000 +0200
@@ -95,7 +95,7 @@
env[ei] = NULL;
assert(ei < MAX_ENV);
- run_trigger(yellow_trigger, NULL, env);
+ run_trigger(yellow_trigger, NULL, env, false);
for (i = 0; i < ei; i++)
free(env[i]);
out:
