Hello community, here is the log from the commit of package mcelog for openSUSE:Factory checked in at 2019-03-27 16:13:47 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/mcelog (Old) and /work/SRC/openSUSE:Factory/.mcelog.new.25356 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "mcelog" Wed Mar 27 16:13:47 2019 rev:49 rq:688262 version:1.62 Changes: -------- --- /work/SRC/openSUSE:Factory/mcelog/mcelog.changes 2018-10-01 09:06:45.743823400 +0200 +++ /work/SRC/openSUSE:Factory/.mcelog.new.25356/mcelog.changes 2019-03-27 16:13:53.519629468 +0100 @@ -1,0 +2,10 @@ +Mon Mar 25 11:31:24 UTC 2019 - [email protected] + +- Update to version 1.62: + * mcelog: Fix memory controller bank channel mappings for Skylake + * mcelog: update tests for new error code + * mcelog: Add decoding for Optane DC persistent memory mode + * mcelog: Deduce channel number for Haswell/Broadwell/Skylake systems +- Change mcelog.spec to use autosetup + +------------------------------------------------------------------- Old: ---- mcelog-1.60.tar.xz New: ---- mcelog-1.62.tar.xz ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ mcelog.spec ++++++ --- /var/tmp/diff_new_pack.ZrEhNN/_old 2019-03-27 16:13:55.831628878 +0100 +++ /var/tmp/diff_new_pack.ZrEhNN/_new 2019-03-27 16:13:55.855628872 +0100 @@ -1,7 +1,7 @@ # # spec file for package mcelog # -# Copyright (c) 2018 SUSE LINUX GmbH, Nuernberg, Germany. +# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany. # # All modifications and additions to the file contributed by third parties # remain the property of their copyright owners, unless otherwise agreed @@ -12,7 +12,7 @@ # license that conforms to the Open Source Definition (Version 1.9) # published by the Open Source Initiative. -# Please submit bugfixes or comments via http://bugs.opensuse.org/ +# Please submit bugfixes or comments via https://bugs.opensuse.org/ # @@ -22,10 +22,10 @@ %endif Name: mcelog -Version: 1.60 +Version: 1.62 Release: 0 Summary: Log Machine Check Events -License: GPL-2.0 +License: GPL-2.0-only Group: System/Monitoring Url: http://www.mcelog.org/ Source: %{name}-%{version}.tar.xz @@ -63,19 +63,7 @@ In addition, it allows decoding machine check kernel panic messages. %prep -%setup -q -%patch1 -p1 -%patch2 -p1 -%patch3 -p1 -%patch4 -p1 -%patch5 -p1 -%patch6 -p1 -%patch7 -p1 -%patch8 -p1 -%patch9 -p1 -%patch10 -p1 -%patch11 -p1 -%patch12 -p1 +%autosetup %build make %{?_smp_mflags} CFLAGS="%{optflags} -fpie -pie" ++++++ _service ++++++ --- /var/tmp/diff_new_pack.ZrEhNN/_old 2019-03-27 16:13:56.347628746 +0100 +++ /var/tmp/diff_new_pack.ZrEhNN/_new 2019-03-27 16:13:56.367628742 +0100 @@ -4,9 +4,9 @@ <param name="url">https://github.com/andikleen/mcelog</param> <param name="subdir"></param> <param name="filename">mcelog</param> - <param name="versionformat">1.60</param> + <param name="versionformat">1.62</param> <param name="changesgenerate">enable</param> - <param name="revision">refs/tags/v160</param> + <param name="revision">refs/tags/v162</param> </service> <service name="recompress" mode="disabled"> <param name="file">mcelog*.tar</param> ++++++ _servicedata ++++++ --- /var/tmp/diff_new_pack.ZrEhNN/_old 2019-03-27 16:13:56.523628702 +0100 +++ /var/tmp/diff_new_pack.ZrEhNN/_new 2019-03-27 16:13:56.539628698 +0100 @@ -1,4 +1,4 @@ <servicedata> <service name="tar_scm"> <param name="url">https://github.com/andikleen/mcelog</param> - <param name="changesrevision">10b832edec31d48adf414709dec9327354310f52</param></service></servicedata> \ No newline at end of file + <param name="changesrevision">0062f7cb3ff0f94709087ac302d502f5e39f6e60</param></service></servicedata> \ No newline at end of file ++++++ mcelog-1.60.tar.xz -> mcelog-1.62.tar.xz ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/haswell.c new/mcelog-1.62/haswell.c --- old/mcelog-1.60/haswell.c 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/haswell.c 2019-02-05 20:57:07.000000000 +0100 @@ -148,3 +148,45 @@ break; } } + +/* + * There isn't enough information to identify the DIMM. But + * we can derive the channel from the bank number. + * There can be two memory controllers. We number the channels + * on the second controller: 4, 5, 6, 7 + */ +void haswell_memerr_misc(struct mce *m, int *channel, int *dimm) +{ + u64 status = m->status; + unsigned chan; + + /* Check this is a memory error */ + if (!test_prefix(7, status & 0xefff)) + return; + + chan = EXTRACT(status, 0, 3); + if (chan == 0xf) + return; + + switch (m->bank) { + case 7: + /* Home agent 0 */ + break; + case 8: + /* Home agent 1 */ + chan += 4; + break; + case 9: case 10: case 11: case 12: + /* Memory controller 0 */ + chan = m->bank - 9; + break; + case 13: case 14: case 15: case 16: + /* Memory controller 1 */ + chan = (m->bank - 13) + 4; + break; + default: + return; + } + + channel[0] = chan; +} diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/haswell.h new/mcelog-1.62/haswell.h --- old/mcelog-1.60/haswell.h 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/haswell.h 2019-02-05 20:57:07.000000000 +0100 @@ -1,2 +1,3 @@ void hsw_decode_model(int cputype, int bank, u64 status, u64 misc); void haswell_ep_memerr_misc(struct mce *m, int *channel, int *dimm); +void haswell_memerr_misc(struct mce *m, int *channel, int *dimm); diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/input/GENMCA new/mcelog-1.62/input/GENMCA --- old/mcelog-1.60/input/GENMCA 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/input/GENMCA 2019-02-05 20:57:07.000000000 +0100 @@ -71,13 +71,18 @@ { local chan=$(($ecode & 0xf)) local mmm_num=$(($ecode >> 4 & 7)) + local mem_as_cache_bit=$(($ecode >> 9 & 1)) if [[ "$chan" -eq 0xf ]]; then chan="unspecified" else chan=$(printf "%u" $chan) fi - echo "MEMORY CONTROLLER ${mmm_mnemonic[mmm_num]}_CHANNEL${chan}_ERR" > $mca_fexpect + if [[ "$mem_as_cache_bit" -ne 0x1 ]]; then + echo "MEMORY CONTROLLER ${mmm_mnemonic[mmm_num]}_CHANNEL${chan}_ERR" > $mca_fexpect + else + echo "Memory as cache: MEMORY CONTROLLER ${mmm_mnemonic[mmm_num]}_CHANNEL${chan}_ERR" > $mca_fexpect + fi } cache_hierarchy_errors() @@ -153,7 +158,9 @@ elif [[ "$ecode" -ge 0x0020 && "$ecode" -lt 0x0080 ]]; then complain elif [[ "$ecode" -ge 0x0080 && "$ecode" -lt 0x0100 ]]; then memory_controller_errors elif [[ "$ecode" -ge 0x0100 && "$ecode" -lt 0x0200 ]]; then cache_hierarchy_errors -elif [[ "$ecode" -ge 0x0200 && "$ecode" -lt 0x0400 ]]; then complain +elif [[ "$ecode" -ge 0x0200 && "$ecode" -lt 0x0280 ]]; then complain +elif [[ "$ecode" -ge 0x0280 && "$ecode" -lt 0x0300 ]]; then memory_controller_errors +elif [[ "$ecode" -ge 0x0300 && "$ecode" -lt 0x0400 ]]; then complain elif [[ "$ecode" -ge 0x0400 && "$ecode" -lt 0x0800 ]]; then simple_error elif [[ "$ecode" -ge 0x0800 && "$ecode" -lt 0x1000 ]]; then bus_and_interconnect_errors fi diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/intel.c new/mcelog-1.62/intel.c --- old/mcelog-1.60/intel.c 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/intel.c 2019-02-05 20:57:07.000000000 +0100 @@ -25,6 +25,7 @@ #include "sandy-bridge.h" #include "ivy-bridge.h" #include "haswell.h" +#include "skylake_xeon.h" int memory_error_support; @@ -140,6 +141,13 @@ case CPU_IVY_BRIDGE_EPEX: ivy_bridge_ep_memerr_misc(m, channel, dimm); break; + case CPU_HASWELL_EPEX: + case CPU_BROADWELL_EPEX: + haswell_memerr_misc(m, channel, dimm); + break; + case CPU_SKYLAKE_XEON: + skylake_memerr_misc(m, channel, dimm); + break; default: break; } diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/p4.c new/mcelog-1.62/p4.c --- old/mcelog-1.60/p4.c 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/p4.c 2019-02-05 20:57:07.000000000 +0100 @@ -199,6 +199,9 @@ CACHE_RRRR_SHIFT)); if (track == 2) run_yellow_trigger(cpu, typenum, levelnum, type, level,socket); + } else if (test_prefix(9, mca) && EXTRACT(mca, 7, 8) == 1) { + Wprintf("Memory as cache: "); + decode_memory_controller(mca, bank); } else if (test_prefix(10, mca)) { if (mca == 0x400) Wprintf("Internal Timer error\n"); diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/skylake_xeon.c new/mcelog-1.62/skylake_xeon.c --- old/mcelog-1.60/skylake_xeon.c 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/skylake_xeon.c 2019-02-05 20:57:07.000000000 +0100 @@ -228,3 +228,55 @@ return 0; } + +/* + * There isn't enough information to identify the DIMM. But + * we can derive the channel from the bank number. + * There can be two memory controllers. We number the channels + * on the second controller: 3, 4, 5 + */ +void skylake_memerr_misc(struct mce *m, int *channel, int *dimm) +{ + u64 status = m->status; + unsigned chan; + + /* Check this is a memory error */ + if (!test_prefix(7, status & 0xefff)) + return; + + chan = EXTRACT(status, 0, 3); + if (chan == 0xf) + return; + + switch (m->bank) { + case 7: + /* Home agent 0 */ + break; + case 8: + /* Home agent 1 */ + chan += 3; + break; + case 13: /* Memory controller 0, channel 0 */ + chan = 0; + break; + case 14: /* Memory controller 0, channel 1 */ + chan = 1; + break; + case 15: /* Memory controller 1, channel 0 */ + chan = 3; + break; + case 16: /* Memory controller 1, channel 1 */ + chan = 4; + break; + case 17: /* Memory controller 0, channel 2 */ + chan = 2; + break; + case 18: /* Memory controller 1, channel 2 */ + chan = 5; + break; + default: + return; + } + + channel[0] = chan; +} diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-1.60/skylake_xeon.h new/mcelog-1.62/skylake_xeon.h --- old/mcelog-1.60/skylake_xeon.h 2018-08-09 23:49:49.000000000 +0200 +++ new/mcelog-1.62/skylake_xeon.h 2019-02-05 20:57:07.000000000 +0100 @@ -1,2 +1,3 @@ void skylake_s_decode_model(int cputype, int bank, u64 status, u64 misc); int skylake_s_ce_type(int bank, u64 status, u64 misc); +void skylake_memerr_misc(struct mce *m, int *channel, int *dimm);
