Hello community,

here is the log from the commit of package gdb for openSUSE:Factory checked in 
at 2020-01-23 16:09:56
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/gdb (Old)
 and      /work/SRC/openSUSE:Factory/.gdb.new.26092 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "gdb"

Thu Jan 23 16:09:56 2020 rev:136 rq:765839 version:8.3.1

Changes:
--------
--- /work/SRC/openSUSE:Factory/gdb/gdb.changes  2019-12-24 14:29:26.170560447 
+0100
+++ /work/SRC/openSUSE:Factory/.gdb.new.26092/gdb.changes       2020-01-23 
16:10:27.835619836 +0100
@@ -1,0 +2,8 @@
+Fri Jan 17 15:43:46 UTC 2020 - [email protected]
+
+- Add support for official name of s390 arch13: z15.
+  Add descriptions for arch13 instructions.  Adds
+  gdb-arch13-1.diff, gdb-arch13-2.diff and gdb-arch13-3.diff.
+  [jsc#SLE-7903]
+
+-------------------------------------------------------------------

New:
----
  gdb-arch13-1.diff
  gdb-arch13-2.diff
  gdb-arch13-3.diff

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ gdb.spec ++++++
--- /var/tmp/diff_new_pack.JlzSol/_old  2020-01-23 16:10:36.563625007 +0100
+++ /var/tmp/diff_new_pack.JlzSol/_new  2020-01-23 16:10:36.563625007 +0100
@@ -1,7 +1,7 @@
 #
 # spec file for package gdb
 #
-# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany.
+# Copyright (c) 2020 SUSE LINUX GmbH, Nuernberg, Germany.
 # Copyright (c) 2012 RedHat
 #
 # All modifications and additions to the file contributed by third parties
@@ -13,7 +13,7 @@
 # license that conforms to the Open Source Definition (Version 1.9)
 # published by the Open Source Initiative.
 
-# Please submit bugfixes or comments via https://bugs.opensuse.org/
+# Please submit bugfixes or comments via http://bugs.opensuse.org/
 #
 
 
@@ -248,6 +248,9 @@
 Patch2010:      gdb-fix-heap-use-after-free-in-typename-concat.patch
 Patch2011:      gdb-dwarf-reader-reject-sections-with-invalid-sizes.patch
 Patch2012:      gdb-0001-remove-alloca-0-calls.patch
+Patch2013:      gdb-arch13-1.diff
+Patch2014:      gdb-arch13-2.diff
+Patch2015:      gdb-arch13-3.diff
 
 # Proposed patch for PR symtab/24971
 Patch2500:      gdb-symtab-prefer-var-def-over-decl.patch
@@ -601,6 +604,9 @@
 %patch2010 -p1
 %patch2011 -p1
 %patch2012 -p1
+%patch2013 -p1
+%patch2014 -p1
+%patch2015 -p1
 
 %patch2500 -p1
 %patch2501 -p1

++++++ gdb-arch13-1.diff ++++++
commit ba354106f02e25c9adc3dc1364d6a974216ec94e
Author: Andreas Krebbel <[email protected]>
Date:   Tue Mar 12 14:09:55 2019 +0100

    S/390: arch13: Add instruction descriptions
    
    opcodes/ChangeLog:
    
    2019-03-12  Andreas Krebbel  <[email protected]>
    
        * s390-opc.txt: Add instruction descriptions.

diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index be4c97d..58a2490 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1888,106 +1888,120 @@ e70000000036 vlm VRS_VVRDU "vector load multiple" 
arch12 zarch optparm
 e7000000000e vst VRX_VRRDU "vector store" arch12 zarch optparm
 e7000000003e vstm VRS_VVRDU "vector store multiple" arch12 zarch optparm
 
+
 # arch13 instructions
 
-b9f5 ncrk RRF_R0RR2 " " arch13 zarch
-b9e5 ncgrk RRF_R0RR2 " " arch13 zarch
-e50a mvcrl SSE_RDRD " " arch13 zarch
-b974 nnrk RRF_R0RR2 " " arch13 zarch
-b964 nngrk RRF_R0RR2 " " arch13 zarch
-b976 nork RRF_R0RR2 " " arch13 zarch
-b966 nogrk RRF_R0RR2 " " arch13 zarch
-b977 nxrk RRF_R0RR2 " " arch13 zarch
-b967 nxgrk RRF_R0RR2 " " arch13 zarch
-b975 ocrk RRF_R0RR2 " " arch13 zarch
-b965 ocgrk RRF_R0RR2 " " arch13 zarch
-b9e1 popcnt RRF_U0RR " " arch13 zarch optparm
-b9f0 selr RRF_RURR " " arch13 zarch
-b9f00000 selr*20 RRF_R0RR3 " " arch13 zarch
-b9e3 selgr RRF_RURR " " arch13 zarch
-b9e30000 selgr*20 RRF_R0RR3 " " arch13 zarch
-b9c0 selhhhr RRF_RURR " " arch13 zarch
-b9c00000 selhhhr*20 RRF_R0RR3 " " arch13 zarch
-
-e60000000006 vlbr VRX_VRRDU " " arch13 zarch
-e60000001006 vlbrh VRX_VRRD " " arch13 zarch
-e60000002006 vlbrf VRX_VRRD " " arch13 zarch
-e60000003006 vlbrg VRX_VRRD " " arch13 zarch
-e60000004006 vlbrq VRX_VRRD " " arch13 zarch
-
-e60000000007 vler VRX_VRRDU " " arch13 zarch
-e60000001007 vlerh VRX_VRRD " " arch13 zarch
-e60000002007 vlerf VRX_VRRD " " arch13 zarch
-e60000003007 vlerg VRX_VRRD " " arch13 zarch
-
-e60000000004 vllebrz VRX_VRRDU " " arch13 zarch
-e60000001004 vllebrzh VRX_VRRD " " arch13 zarch
-e60000002004 vllebrzf VRX_VRRD " " arch13 zarch
-e60000003004 ldrv VRX_VRRD " " arch13 zarch
-e60000003004 vllebrzg VRX_VRRD " " arch13 zarch
-e60000006004 lerv VRX_VRRD " " arch13 zarch
-e60000006004 vllebrze VRX_VRRD " " arch13 zarch
-
-e60000000001 vlebrh VRX_VRRDU " " arch13 zarch
-e60000000003 vlebrf VRX_VRRDU " " arch13 zarch
-e60000000002 vlebrg VRX_VRRDU " " arch13 zarch
-
-e60000000005 vlbrrep VRX_VRRDU " " arch13 zarch
-e60000001005 vlbrreph VRX_VRRD " " arch13 zarch
-e60000002005 vlbrrepf VRX_VRRD " " arch13 zarch
-e60000003005 vlbrrepg VRX_VRRD " " arch13 zarch
-
-e6000000000e vstbr VRX_VRRDU " " arch13 zarch
-e6000000100e vstbrh VRX_VRRD " " arch13 zarch
-e6000000200e vstbrf VRX_VRRD " " arch13 zarch
-e6000000300e vstbrg VRX_VRRD " " arch13 zarch
-e6000000400e vstbrq VRX_VRRD " " arch13 zarch
-
-e6000000000f vster VRX_VRRDU " " arch13 zarch
-e6000000100f vsterh VRX_VRRD " " arch13 zarch
-e6000000200f vsterf VRX_VRRD " " arch13 zarch
-e6000000300f vsterg VRX_VRRD " " arch13 zarch
-
-e60000000009 vstebrh VRX_VRRDU " " arch13 zarch
-e6000000000b vstebrf VRX_VRRDU " " arch13 zarch
-e6000000000b sterv VRX_VRRD " " arch13 zarch
-e6000000000a vstebrg VRX_VRRDU " " arch13 zarch
-e6000000000a stdrv VRX_VRRD " " arch13 zarch
-
-e70000000086 vsld VRI_VVV0U " " arch13 zarch
-e70000000087 vsrd VRI_VVV0U " " arch13 zarch
-
-e7000000008b vstrs VRR_VVVUU0V " " arch13 zarch optparm
-
-e7000000008b vstrsb VRR_VVVU0VB " " arch13 zarch optparm
-e7000100008b vstrsh VRR_VVVU0VB " " arch13 zarch optparm
-e7000200008b vstrsf VRR_VVVU0VB " " arch13 zarch optparm
-
-e7000020008b vstrszb VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000120008b vstrszh VRR_VVVU0VB2 " " arch13 zarch optparm
-e7000220008b vstrszf VRR_VVVU0VB2 " " arch13 zarch optparm
-
-e700000000c3 vcfps VRR_VV0UUU " " arch13 zarch
-e700000020c3 vcefb VRR_VV0UU " " arch13 zarch
-e700000820c3 wcefb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c1 vcfpl VRR_VV0UUU " " arch13 zarch
-e700000020c1 vcelfb VRR_VV0UU " " arch13 zarch
-e700000820c1 wcelfb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c2 vcsfp VRR_VV0UUU " " arch13 zarch
-e700000020c2 vcfeb VRR_VV0UU " " arch13 zarch
-e700000820c2 wcfeb VRR_VV0UU8 " " arch13 zarch
-
-e700000000c0 vclfp VRR_VV0UUU " " arch13 zarch
-e700000020c0 vclfeb VRR_VV0UU " " arch13 zarch
-e700000820c0 wclfeb VRR_VV0UU8 " " arch13 zarch
-
-b939 dfltcc RRF_R0RR2 " " arch13 zarch
-
-b938 sortl RRE_RR " " arch13 zarch
-
-e60000000050 vcvb VRR_RV0UU " " arch13 zarch optparm
-e60000000052 vcvbg VRR_RV0UU " " arch13 zarch optparm
-
-b93a kdsa RRE_RR " " arch13 zarch
+
+# Miscellaneous Instruction Extensions Facility 2
+
+b9f5 ncrk RRF_R0RR2 "and with complement 32 bit" arch13 zarch
+b9e5 ncgrk RRF_R0RR2 "and with complement 64 bit" arch13 zarch
+e50a mvcrl SSE_RDRD "move right to left" arch13 zarch
+b974 nnrk RRF_R0RR2 "nand 32 bit" arch13 zarch
+b964 nngrk RRF_R0RR2 "nand 64 bit" arch13 zarch
+b976 nork RRF_R0RR2 "nor 32 bit" arch13 zarch
+b966 nogrk RRF_R0RR2 "nor 64 bit" arch13 zarch
+b977 nxrk RRF_R0RR2 "not exclusive or 32 bit" arch13 zarch
+b967 nxgrk RRF_R0RR2 "not exclusive or 64 bit" arch13 zarch
+b975 ocrk RRF_R0RR2 "or with complement 32 bit" arch13 zarch
+b965 ocgrk RRF_R0RR2 "or with complement 64 bit" arch13 zarch
+b9e1 popcnt RRF_U0RR "population count arch13" arch13 zarch optparm
+b9f0 selr RRF_RURR "select 32 bit" arch13 zarch
+b9f00000 selr*20 RRF_R0RR3 "select 32 bit" arch13 zarch
+b9e3 selgr RRF_RURR "select 64 bit" arch13 zarch
+b9e30000 selgr*20 RRF_R0RR3 "select 64 bit" arch13 zarch
+b9c0 selhhhr RRF_RURR "select high" arch13 zarch
+b9c00000 selhhhr*20 RRF_R0RR3 "select high" arch13 zarch
+
+# Vector Enhancements Facility 2
+
+e60000000006 vlbr VRX_VRRDU "vector load byte reversed elements" arch13 zarch
+e60000001006 vlbrh VRX_VRRD "vector load byte reversed halfword elements" 
arch13 zarch
+e60000002006 vlbrf VRX_VRRD "vector load byte reversed word elements" arch13 
zarch
+e60000003006 vlbrg VRX_VRRD "vector load byte reversed doubleword elements" 
arch13 zarch
+e60000004006 vlbrq VRX_VRRD "vector load byte reversed quadword elements" 
arch13 zarch
+
+e60000000007 vler VRX_VRRDU "vector load elements reversed" arch13 zarch
+e60000001007 vlerh VRX_VRRD "vector load halfword elements reversed" arch13 
zarch
+e60000002007 vlerf VRX_VRRD "vector load word elements reversed" arch13 zarch
+e60000003007 vlerg VRX_VRRD "vector load doubleword elements reversed" arch13 
zarch
+
+e60000000004 vllebrz VRX_VRRDU "vector load byte reversed element and zero" 
arch13 zarch
+e60000001004 vllebrzh VRX_VRRD "vector load byte reversed halfword element and 
zero" arch13 zarch
+e60000002004 vllebrzf VRX_VRRD "vector load byte reversed word element and 
zero" arch13 zarch
+e60000003004 ldrv VRX_VRRD "load byte reversed doubleword" arch13 zarch
+e60000003004 vllebrzg VRX_VRRD "vector load byte reversed doubleword element 
and zero" arch13 zarch
+e60000006004 lerv VRX_VRRD "load byte reversed word" arch13 zarch
+e60000006004 vllebrze VRX_VRRD "vector load byte reversed word element 
left-aligned and zero" arch13 zarch
+
+e60000000001 vlebrh VRX_VRRDU "vector load byte reversed halfword element" 
arch13 zarch
+e60000000003 vlebrf VRX_VRRDU "vector load byte reversed word element" arch13 
zarch
+e60000000002 vlebrg VRX_VRRDU "vector load byte reversed doubleword element" 
arch13 zarch
+
+e60000000005 vlbrrep VRX_VRRDU "vector load byte reversed element and 
replicate" arch13 zarch
+e60000001005 vlbrreph VRX_VRRD "vector load byte reversed halfword element and 
replicate" arch13 zarch
+e60000002005 vlbrrepf VRX_VRRD "vector load byte reversed word element and 
replicate" arch13 zarch
+e60000003005 vlbrrepg VRX_VRRD "vector load byte reversed doubleword element 
and replicate" arch13 zarch
+
+e6000000000e vstbr VRX_VRRDU "vector store byte reversed elements" arch13 zarch
+e6000000100e vstbrh VRX_VRRD "vector store byte reversed halfword elements" 
arch13 zarch
+e6000000200e vstbrf VRX_VRRD "vector store byte reversed word elements" arch13 
zarch
+e6000000300e vstbrg VRX_VRRD "vector store byte reversed doubleword elements" 
arch13 zarch
+e6000000400e vstbrq VRX_VRRD "vector store byte reversed quadword elements" 
arch13 zarch
+
+e6000000000f vster VRX_VRRDU "vector store elements reversed" arch13 zarch
+e6000000100f vsterh VRX_VRRD "vector store halfword elements reversed" arch13 
zarch
+e6000000200f vsterf VRX_VRRD "vector store word elements reversed" arch13 zarch
+e6000000300f vsterg VRX_VRRD "vector store doubleword elements reversed" 
arch13 zarch
+
+e60000000009 vstebrh VRX_VRRDU "vector store byte reversed halfword element" 
arch13 zarch
+e6000000000b vstebrf VRX_VRRDU "vector store byte reversed word element" 
arch13 zarch
+e6000000000b sterv VRX_VRRD "store byte reversed word" arch13 zarch
+e6000000000a vstebrg VRX_VRRDU "vector store byte reversed doubleword element" 
arch13 zarch
+e6000000000a stdrv VRX_VRRD "store byte reversed doubleword" arch13 zarch
+
+e70000000086 vsld VRI_VVV0U "vector shift left double by bit" arch13 zarch
+e70000000087 vsrd VRI_VVV0U "vector shift right double by bit" arch13 zarch
+
+e7000000008b vstrs VRR_VVVUU0V "vector string search" arch13 zarch optparm
+
+e7000000008b vstrsb VRR_VVVU0VB "vector string search byte" arch13 zarch 
optparm
+e7000100008b vstrsh VRR_VVVU0VB "vector string search halfword" arch13 zarch 
optparm
+e7000200008b vstrsf VRR_VVVU0VB "vector string search word" arch13 zarch 
optparm
+
+e7000020008b vstrszb VRR_VVVU0VB2 "vector string search byte zero" arch13 
zarch optparm
+e7000120008b vstrszh VRR_VVVU0VB2 "vector string search halfword zero" arch13 
zarch optparm
+e7000220008b vstrszf VRR_VVVU0VB2 "vector string search word zero" arch13 
zarch optparm
+
+e700000000c3 vcfps VRR_VV0UUU "vector fp convert from fixed" arch13 zarch
+e700000020c3 vcefb VRR_VV0UU "vector fp convert from fixed 32 bit" arch13 zarch
+e700000820c3 wcefb VRR_VV0UU8 "vector fp convert from fixed 32 bit" arch13 
zarch
+
+e700000000c1 vcfpl VRR_VV0UUU "vector fp convert from logical" arch13 zarch
+e700000020c1 vcelfb VRR_VV0UU "vector fp convert from logical 32 bit" arch13 
zarch
+e700000820c1 wcelfb VRR_VV0UU8 "vector fp convert from logical 32 bit" arch13 
zarch
+
+e700000000c2 vcsfp VRR_VV0UUU "vector fp convert to fixed" arch13 zarch
+e700000020c2 vcfeb VRR_VV0UU "vector fp convert to fixed 32 bit" arch13 zarch
+e700000820c2 wcfeb VRR_VV0UU8 "vector fp convert to fixed 32 bit" arch13 zarch
+
+e700000000c0 vclfp VRR_VV0UUU "vector fp convert to logical" arch13 zarch
+e700000020c0 vclfeb VRR_VV0UU "vector fp convert to logical 32 bit" arch13 
zarch
+e700000820c0 wclfeb VRR_VV0UU8 "vector fp convert to logical 32 bit" arch13 
zarch
+
+# Deflate conversion facility
+
+b939 dfltcc RRF_R0RR2 "deflate conversion call" arch13 zarch
+
+# Enhanced-Sort Facility
+
+b938 sortl RRE_RR "sort lists" arch13 zarch
+
+# Vector packed decimal enhancement facility
+
+e60000000050 vcvb VRR_RV0UU "vector convert to binary 32 bit" arch13 zarch 
optparm
+e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch 
optparm
+
+# Message Security Assist Extension 9
+
+b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch
++++++ gdb-arch13-2.diff ++++++
[matz: removed hunk that are exclusive to binutils]

commit 40f382e88d0391ffaa4098c92cbf339a7924a629
Author: Andreas Krebbel <[email protected]>
Date:   Tue Mar 12 14:09:55 2019 +0100

    S/390: arch13: Adjust to recent changes
    
    opcodes/ChangeLog:
    
    2019-03-12  Andreas Krebbel  <[email protected]>
    
        * s390-opc.txt: Rename selhhhr to selfhr.  Remove optional operand
        from vstrszb, vstrszh, and vstrszf.
    
    gas/ChangeLog:
    
    2019-03-12  Andreas Krebbel  <[email protected]>
    
        * testsuite/gas/s390/zarch-arch13.s: Adjust testcase to optable changes.
        * testsuite/gas/s390/zarch-arch13.d: Likewise.

diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index 58a2490..7569a56 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -1910,8 +1910,8 @@ b9f0 selr RRF_RURR "select 32 bit" arch13 zarch
 b9f00000 selr*20 RRF_R0RR3 "select 32 bit" arch13 zarch
 b9e3 selgr RRF_RURR "select 64 bit" arch13 zarch
 b9e30000 selgr*20 RRF_R0RR3 "select 64 bit" arch13 zarch
-b9c0 selhhhr RRF_RURR "select high" arch13 zarch
-b9c00000 selhhhr*20 RRF_R0RR3 "select high" arch13 zarch
+b9c0 selfhr RRF_RURR "select high" arch13 zarch
+b9c00000 selfhr*20 RRF_R0RR3 "select high" arch13 zarch
 
 # Vector Enhancements Facility 2
 
@@ -1969,9 +1969,9 @@ e7000000008b vstrsb VRR_VVVU0VB "vector string search 
byte" arch13 zarch optparm
 e7000100008b vstrsh VRR_VVVU0VB "vector string search halfword" arch13 zarch 
optparm
 e7000200008b vstrsf VRR_VVVU0VB "vector string search word" arch13 zarch 
optparm
 
-e7000020008b vstrszb VRR_VVVU0VB2 "vector string search byte zero" arch13 
zarch optparm
-e7000120008b vstrszh VRR_VVVU0VB2 "vector string search halfword zero" arch13 
zarch optparm
-e7000220008b vstrszf VRR_VVVU0VB2 "vector string search word zero" arch13 
zarch optparm
+e7000020008b vstrszb VRR_VVV0V "vector string search byte zero" arch13 zarch
+e7000120008b vstrszh VRR_VVV0V "vector string search halfword zero" arch13 
zarch
+e7000220008b vstrszf VRR_VVV0V "vector string search word zero" arch13 zarch
 
 e700000000c3 vcfps VRR_VV0UUU "vector fp convert from fixed" arch13 zarch
 e700000020c3 vcefb VRR_VV0UU "vector fp convert from fixed 32 bit" arch13 zarch
++++++ gdb-arch13-3.diff ++++++
[matz: removed hunks that are exclusive to binutils]
commit 46e292ab0af65d13675b54f808fa24e12999e405
Author: Andreas Krebbel <[email protected]>
Date:   Tue Oct 8 11:23:57 2019 +0200

    S/390: Add support for z15 as CPU name.
    
    So far z15 was identified as arch13. After the machine has been
    announced we can now add the real name.
    
    gas/ChangeLog:
    
    2019-10-08  Andreas Krebbel  <[email protected]>
    
        * config/tc-s390.c (s390_parse_cpu): Add z15 as alternate CPU
        name.
        * doc/as.texi: Add z15 to CPU string list.
        * doc/c-s390.texi: Likewise.
    
    opcodes/ChangeLog:
    
    2019-10-08  Andreas Krebbel  <[email protected]>
    
        * s390-mkopc.c (main): Enable z15 as CPU string in the opcode
        table.

diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c
index 0d07678..fe21ea1 100644
--- a/opcodes/s390-mkopc.c
+++ b/opcodes/s390-mkopc.c
@@ -377,7 +377,8 @@ main (void)
       else if (strcmp (cpu_string, "z14") == 0
               || strcmp (cpu_string, "arch12") == 0)
        min_cpu = S390_OPCODE_ARCH12;
-      else if (strcmp (cpu_string, "arch13") == 0)
+      else if (strcmp (cpu_string, "z15") == 0
+              || strcmp (cpu_string, "arch13") == 0)
        min_cpu = S390_OPCODE_ARCH13;
       else {
        fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);

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