Hello community, here is the log from the commit of package gcc7 for openSUSE:Factory checked in at 2020-03-05 23:16:09 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/gcc7 (Old) and /work/SRC/openSUSE:Factory/.gcc7.new.26092 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "gcc7" Thu Mar 5 23:16:09 2020 rev:28 rq:780847 version:7.5.0+r278197 Changes: -------- --- /work/SRC/openSUSE:Factory/gcc7/cross-aarch64-gcc7.changes 2020-01-18 12:15:18.567048115 +0100 +++ /work/SRC/openSUSE:Factory/.gcc7.new.26092/cross-aarch64-gcc7.changes 2020-03-05 23:16:11.473106270 +0100 @@ -1,0 +2,23 @@ +Fri Feb 28 16:59:30 UTC 2020 - Martin Liška <[email protected]> + +- Add gcc7-pr93965.patch in order to fix binutils release + date detection issue. + +------------------------------------------------------------------- +Wed Jan 29 09:56:19 UTC 2020 - Richard Biener <[email protected]> + +- Add gcc48-bsc1161913.patch to fix register allocation issue with + exception handling code on s390x. [bsc#1161913] + +------------------------------------------------------------------- +Wed Jan 22 17:25:50 UTC 2020 - [email protected] + +- Add gcc7-pr92692.patch: Backport PR target/92692 to fix + miscompilation of some atomic code on aarch64. [bsc#1150164] + +------------------------------------------------------------------- +Mon Jan 20 12:04:04 UTC 2020 - Richard Biener <[email protected]> + +- Add gcc7-pr93246.patch: Backport PR middle-end/93246 + +------------------------------------------------------------------- cross-arm-gcc7.changes: same change cross-arm-none-gcc7-bootstrap.changes: same change cross-arm-none-gcc7.changes: same change cross-avr-gcc7-bootstrap.changes: same change cross-avr-gcc7.changes: same change cross-epiphany-gcc7-bootstrap.changes: same change cross-epiphany-gcc7.changes: same change cross-hppa-gcc7.changes: same change cross-i386-gcc7.changes: same change cross-m68k-gcc7.changes: same change cross-mips-gcc7.changes: same change cross-nvptx-gcc7.changes: same change cross-ppc64-gcc7.changes: same change cross-ppc64le-gcc7.changes: same change cross-rx-gcc7-bootstrap.changes: same change cross-rx-gcc7.changes: same change cross-s390x-gcc7.changes: same change cross-sparc-gcc7.changes: same change cross-sparc64-gcc7.changes: same change cross-x86_64-gcc7.changes: same change gcc7-testresults.changes: same change gcc7.changes: same change New: ---- gcc48-bsc1161913.patch gcc7-pr92692.patch gcc7-pr93246.patch gcc7-pr93965.patch ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ cross-aarch64-gcc7.spec ++++++ --- /var/tmp/diff_new_pack.MMzBaB/_old 2020-03-05 23:16:33.741118871 +0100 +++ /var/tmp/diff_new_pack.MMzBaB/_new 2020-03-05 23:16:33.749118876 +0100 @@ -128,6 +128,10 @@ Patch19: gcc7-pr85887.patch Patch20: gcc7-bsc1160086.patch Patch21: gcc7-pr92154.patch +Patch22: gcc7-pr93246.patch +Patch23: gcc7-pr92692.patch +Patch24: gcc48-bsc1161913.patch +Patch25: gcc7-pr93965.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -277,6 +281,10 @@ %patch19 %patch20 %patch21 -p1 +%patch22 -p1 +%patch23 -p1 +%patch24 -p1 +%patch25 -p1 %patch51 %patch60 %patch61 cross-arm-gcc7.spec: same change cross-arm-none-gcc7-bootstrap.spec: same change cross-arm-none-gcc7.spec: same change cross-avr-gcc7-bootstrap.spec: same change cross-avr-gcc7.spec: same change cross-epiphany-gcc7-bootstrap.spec: same change cross-epiphany-gcc7.spec: same change cross-hppa-gcc7.spec: same change cross-i386-gcc7.spec: same change cross-m68k-gcc7.spec: same change cross-mips-gcc7.spec: same change cross-nvptx-gcc7.spec: same change cross-ppc64-gcc7.spec: same change cross-ppc64le-gcc7.spec: same change cross-rx-gcc7-bootstrap.spec: same change cross-rx-gcc7.spec: same change cross-s390x-gcc7.spec: same change cross-sparc-gcc7.spec: same change cross-sparc64-gcc7.spec: same change cross-x86_64-gcc7.spec: same change gcc7-testresults.spec: same change ++++++ gcc7.spec ++++++ --- /var/tmp/diff_new_pack.MMzBaB/_old 2020-03-05 23:16:35.793120032 +0100 +++ /var/tmp/diff_new_pack.MMzBaB/_new 2020-03-05 23:16:35.801120036 +0100 @@ -303,6 +303,10 @@ Patch19: gcc7-pr85887.patch Patch20: gcc7-bsc1160086.patch Patch21: gcc7-pr92154.patch +Patch22: gcc7-pr93246.patch +Patch23: gcc7-pr92692.patch +Patch24: gcc48-bsc1161913.patch +Patch25: gcc7-pr93965.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -1758,6 +1762,10 @@ %patch19 %patch20 %patch21 -p1 +%patch22 -p1 +%patch23 -p1 +%patch24 -p1 +%patch25 -p1 %patch51 %patch60 %patch61 ++++++ gcc.spec.in ++++++ --- /var/tmp/diff_new_pack.MMzBaB/_old 2020-03-05 23:16:36.493120428 +0100 +++ /var/tmp/diff_new_pack.MMzBaB/_new 2020-03-05 23:16:36.501120433 +0100 @@ -309,6 +309,10 @@ Patch19: gcc7-pr85887.patch Patch20: gcc7-bsc1160086.patch Patch21: gcc7-pr92154.patch +Patch22: gcc7-pr93246.patch +Patch23: gcc7-pr92692.patch +Patch24: gcc48-bsc1161913.patch +Patch25: gcc7-pr93965.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -1068,6 +1072,10 @@ %patch19 %patch20 %patch21 -p1 +%patch22 -p1 +%patch23 -p1 +%patch24 -p1 +%patch25 -p1 %patch51 %patch60 %patch61 ++++++ gcc48-bsc1161913.patch ++++++ commit 5c8a1211b9873a1b69ef7b2fddae181535bc3b0a Author: Vladimir N. Makarov <[email protected]> Date: Tue Jan 28 15:43:44 2020 -0500 Fix for PR93272 - LRA: EH reg allocated to hold local variable 2020-01-28 Vladimir Makarov <[email protected]> PR rtl-optimization/93272 * ira-lives.c (process_out_of_region_eh_regs): New function. (process_bb_node_lives): Call it. diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c index 31635dd3438..71c545ef105 100644 --- a/gcc/ira-lives.c +++ b/gcc/ira-lives.c @@ -1116,6 +1116,50 @@ find_call_crossed_cheap_reg (rtx insn) return cheap_reg; } +#ifdef EH_RETURN_DATA_REGNO + +/* Add EH return hard registers as conflict hard registers to allocnos + living at end of BB. For most allocnos it is already done in + process_bb_node_lives when we processing input edges but it does + not work when and EH edge is edge out of the current region. This + function covers such out of region edges. */ +static void +process_out_of_region_eh_regs (basic_block bb) +{ + edge e; + edge_iterator ei; + unsigned int i; + bitmap_iterator bi; + bool eh_p = false; + + FOR_EACH_EDGE (e, ei, bb->succs) + if ((e->flags & EDGE_EH) + && IRA_BB_NODE (e->dest)->parent != IRA_BB_NODE (bb)->parent) + eh_p = true; + + if (! eh_p) + return; + + EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), FIRST_PSEUDO_REGISTER, i, bi) + { + ira_allocno_t a = ira_curr_regno_allocno_map[i]; + for (int n = ALLOCNO_NUM_OBJECTS (a) - 1; n >= 0; n--) + { + ira_object_t obj = ALLOCNO_OBJECT (a, n); + for (int k = 0; ; k++) + { + unsigned int regno = EH_RETURN_DATA_REGNO (k); + if (regno == INVALID_REGNUM) + break; + SET_HARD_REG_BIT (OBJECT_CONFLICT_HARD_REGS (obj), regno); + SET_HARD_REG_BIT (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), regno); + } + } + } +} + +#endif + /* Process insns of the basic block given by its LOOP_TREE_NODE to update allocno live ranges, allocno hard register conflicts, intersected calls, and register pressure info for allocnos for the @@ -1170,6 +1214,10 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) EXECUTE_IF_SET_IN_BITMAP (reg_live_out, FIRST_PSEUDO_REGISTER, j, bi) mark_pseudo_regno_live (j); +#ifdef EH_RETURN_DATA_REGNO + process_out_of_region_eh_regs (bb); +#endif + freq = REG_FREQ_FROM_BB (bb); if (freq == 0) freq = 1; ++++++ gcc7-pr92692.patch ++++++ Backported to gcc7 from: From: Wilco Dijkstra <[email protected]> Date: Fri, 17 Jan 2020 13:17:21 +0000 (+0000) Subject: [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) X-Git-Url: https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;a=commitdiff_plain;h=e5e07b68187b9aa334519746c45b8cffc5eb7e5c [AArch64] Fix shrinkwrapping interactions with atomics (PR92692) The separate shrinkwrapping pass may insert stores in the middle of atomics loops which can cause issues on some implementations. Avoid this by delaying splitting atomics patterns until after prolog/epilog generation. gcc/ PR target/92692 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap) Add assert to ensure prolog has been emitted. (aarch64_split_atomic_op): Likewise. * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>) Use epilogue_completed rather than reload_completed. (aarch64_atomic_exchange<mode>): Likewise. (aarch64_atomic_<atomic_optab><mode>): Likewise. (atomic_nand<mode>): Likewise. (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise. (atomic_fetch_nand<mode>): Likewise. (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise. (atomic_nand_fetch<mode>): Likewise. --- Index: gcc-7.5.0+r278197/gcc/config/aarch64/aarch64.c =================================================================== --- gcc-7.5.0+r278197.orig/gcc/config/aarch64/aarch64.c 2020-01-22 18:16:46.000000000 +0100 +++ gcc-7.5.0+r278197/gcc/config/aarch64/aarch64.c 2020-01-22 18:17:46.000000000 +0100 @@ -12005,6 +12005,9 @@ aarch64_gen_atomic_cas (rtx rval, rtx me void aarch64_split_compare_and_swap (rtx operands[]) { + /* Split after prolog/epilog to avoid interactions with shrinkwrapping. */ + gcc_assert (epilogue_completed); + rtx rval, mem, oldval, newval, scratch; machine_mode mode; bool is_weak; @@ -12320,6 +12323,9 @@ void aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, rtx value, rtx model_rtx, rtx cond) { + /* Split after prolog/epilog to avoid interactions with shrinkwrapping. */ + gcc_assert (epilogue_completed); + machine_mode mode = GET_MODE (mem); machine_mode wmode = (mode == DImode ? DImode : SImode); const enum memmodel model = memmodel_from_int (INTVAL (model_rtx)); Index: gcc-7.5.0+r278197/gcc/config/aarch64/atomics.md =================================================================== --- gcc-7.5.0+r278197.orig/gcc/config/aarch64/atomics.md 2020-01-22 18:16:46.000000000 +0100 +++ gcc-7.5.0+r278197/gcc/config/aarch64/atomics.md 2020-01-22 18:20:20.000000000 +0100 @@ -53,7 +53,7 @@ (clobber (match_scratch:SI 7 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_compare_and_swap (operands); @@ -77,7 +77,7 @@ (clobber (match_scratch:SI 7 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_compare_and_swap (operands); @@ -169,7 +169,7 @@ (clobber (match_scratch:SI 4 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (SET, operands[0], NULL, operands[1], @@ -230,7 +230,7 @@ (clobber (match_scratch:SI 4 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (<CODE>, NULL, operands[3], operands[0], @@ -271,7 +271,7 @@ (clobber (match_scratch:SI 4 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0], @@ -317,7 +317,7 @@ (clobber (match_scratch:SI 5 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (<CODE>, operands[0], operands[4], operands[1], @@ -361,7 +361,7 @@ (clobber (match_scratch:SI 5 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1], @@ -408,7 +408,7 @@ (clobber (match_scratch:SI 4 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (<CODE>, NULL, operands[0], operands[1], @@ -455,7 +455,7 @@ (clobber (match_scratch:SI 4 "=&r"))] "" "#" - "&& reload_completed" + "&& epilogue_completed" [(const_int 0)] { aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1], ++++++ gcc7-pr93246.patch ++++++ commit 20e9d78543493f2f6aeef19af4cea54696247fc8 Author: Richard Biener <[email protected]> Date: Tue Jan 14 08:43:32 2020 +0100 PR middle-end/93246 - missing alias subsets Starting with the introduction of TYPE_TYPELESS_STORAGE the situation of having a alias-set zero aggregate field became more common which prevents recording alias-sets of fields of said aggregate as subset of the outer aggregate. component_uses_parent_alias_set_from in the past fended off some of the issues with that but the alias oracles use of the alias set of the base of an access path never appropriately handled it. The following makes it so that alias-sets of fields of alias-set zero aggregate fields are still recorded as subset of the container. 2020-01-14 Richard Biener <[email protected]> PR middle-end/93246 * alias.c (record_component_aliases): Take superset to record into, recurse for alias-set zero fields. (record_component_aliases): New oveerload wrapping around the above. * g++.dg/torture/pr93246.C: New testcase. diff --git a/gcc/alias.c b/gcc/alias.c index b64e3ea264d..053c3494e79 100644 --- a/gcc/alias.c +++ b/gcc/alias.c @@ -1186,15 +1186,14 @@ record_alias_subset (alias_set_type superset, alias_set_type subset) } } -/* Record that component types of TYPE, if any, are part of that type for +/* Record that component types of TYPE, if any, are part of SUPERSET for aliasing purposes. For record types, we only record component types for fields that are not marked non-addressable. For array types, we only record the component type if it is not marked non-aliased. */ void -record_component_aliases (tree type) +record_component_aliases (tree type, alias_set_type superset) { - alias_set_type superset = get_alias_set (type); tree field; if (superset == 0) @@ -1244,7 +1243,21 @@ record_component_aliases (tree type) == get_alias_set (TREE_TYPE (field))); } - record_alias_subset (superset, get_alias_set (t)); + alias_set_type set = get_alias_set (t); + record_alias_subset (superset, set); + /* If the field has alias-set zero make sure to still record + any componets of it. This makes sure that for + struct A { + struct B { + int i; + char c[4]; + } b; + }; + in C++ even though 'B' has alias-set zero because + TYPE_TYPELESS_STORAGE is set, 'A' has the alias-set of + 'int' as subset. */ + if (set == 0) + record_component_aliases (t, superset); } break; @@ -1260,6 +1273,19 @@ record_component_aliases (tree type) } } +/* Record that component types of TYPE, if any, are part of that type for + aliasing purposes. For record types, we only record component types + for fields that are not marked non-addressable. For array types, we + only record the component type if it is not marked non-aliased. */ + +void +record_component_aliases (tree type) +{ + alias_set_type superset = get_alias_set (type); + record_component_aliases (type, superset); +} + + /* Allocate an alias set for use in storing and reading from the varargs spill area. */ diff --git a/gcc/testsuite/g++.dg/torture/pr93246.C b/gcc/testsuite/g++.dg/torture/pr93246.C new file mode 100644 index 00000000000..4c523443175 --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr93246.C @@ -0,0 +1,31 @@ +// { dg-do run } +// { dg-additional-options "-fstrict-aliasing" } + +template <typename = void> struct Optional { + auto is_present() const { const bool &p = inner.present; return p; } + auto set_present() { if (not is_present()) inner.present = true; } + struct InnerType { + bool present = false; + char padding[1] = {0}; + }; + using inner_t = InnerType; + inner_t inner = {}; +}; + +template <typename WrappedType> struct Wrapper { + auto operator-> () { return value; } + WrappedType *value; +}; + +void __attribute__((noinline,noclone)) foo(Optional<>& x) { __asm__ volatile ("":::"memory"); } + +int main() +{ + Optional<> buf{}; + foo(buf); + Wrapper<Optional<>> wo = {&buf}; + wo->set_present(); + auto x = wo->is_present(); + if (!x) + __builtin_abort (); +} ++++++ gcc7-pr93965.patch ++++++ >From 08bf7bde9f2987b1c623d272cc71fc14a1622442 Mon Sep 17 00:00:00 2001 From: Martin Liska <[email protected]> Date: Fri, 28 Feb 2020 17:52:57 +0100 Subject: [PATCH] Improve detection of ld_date. PR other/93965 * configure.ac: Improve detection of ld_date by requiring either two dashes or none. * configure: Regenerate. --- gcc/ChangeLog | 7 +++++++ gcc/configure | 2 +- gcc/configure.ac | 2 +- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/gcc/configure b/gcc/configure index f55cdb8c77f..5381e107bce 100755 --- a/gcc/configure +++ b/gcc/configure @@ -23384,7 +23384,7 @@ if test $in_tree_ld != yes ; then ld_vers=`echo $ld_ver | sed -n \ -e 's,^.*[ ]\([0-9][0-9]*\.[0-9][0-9]*.*\)$,\1,p'` fi - ld_date=`echo $ld_ver | sed -n 's,^.*\([2-9][0-9][0-9][0-9]\)[-]*\([01][0-9]\)[-]*\([0-3][0-9]\).*$,\1\2\3,p'` + ld_date=`echo $ld_ver | sed -n 's,^.*\([2-9][0-9][0-9][0-9]\)\(-*\)\([01][0-9]\)\2\([0-3][0-9]\).*$,\1\3\4,p'` ld_vers_major=`expr "$ld_vers" : '\([0-9]*\)'` ld_vers_minor=`expr "$ld_vers" : '[0-9]*\.\([0-9]*\)'` ld_vers_patch=`expr "$ld_vers" : '[0-9]*\.[0-9]*\.\([0-9]*\)'` diff --git a/gcc/configure.ac b/gcc/configure.ac index 0e6e475950d..0d6230e0ca1 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -2804,7 +2804,7 @@ if test $in_tree_ld != yes ; then ld_vers=`echo $ld_ver | sed -n \ -e 's,^.*[ ]\([0-9][0-9]*\.[0-9][0-9]*.*\)$,\1,p'` fi - ld_date=`echo $ld_ver | sed -n 's,^.*\([2-9][0-9][0-9][0-9]\)[-]*\([01][0-9]\)[-]*\([0-3][0-9]\).*$,\1\2\3,p'` + ld_date=`echo $ld_ver | sed -n 's,^.*\([2-9][0-9][0-9][0-9]\)\(-*\)\([01][0-9]\)\2\([0-3][0-9]\).*$,\1\3\4,p'` ld_vers_major=`expr "$ld_vers" : '\([0-9]*\)'` ld_vers_minor=`expr "$ld_vers" : '[0-9]*\.\([0-9]*\)'` ld_vers_patch=`expr "$ld_vers" : '[0-9]*\.[0-9]*\.\([0-9]*\)'` -- 2.25.0
