Hello community, here is the log from the commit of package gcc7 for openSUSE:Leap:15.2 checked in at 2020-03-20 05:52:12 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Leap:15.2/gcc7 (Old) and /work/SRC/openSUSE:Leap:15.2/.gcc7.new.3160 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "gcc7" Fri Mar 20 05:52:12 2020 rev:50 rq:775321 version:7.5.0+r278197 Changes: -------- --- /work/SRC/openSUSE:Leap:15.2/gcc7/cross-aarch64-gcc7.changes 2020-01-15 14:58:05.077674247 +0100 +++ /work/SRC/openSUSE:Leap:15.2/.gcc7.new.3160/cross-aarch64-gcc7.changes 2020-03-20 05:52:13.048035949 +0100 @@ -1,0 +2,6 @@ +Tue Jan 7 08:38:25 UTC 2020 - Richard Biener <[email protected]> + +- Add gcc7-bsc1160086.patch to fix miscompilation in vectorized code + for s390x. [bsc#1160086] [gcc#92950] + +------------------------------------------------------------------- cross-arm-gcc7.changes: same change cross-arm-none-gcc7-bootstrap.changes: same change cross-arm-none-gcc7.changes: same change cross-avr-gcc7-bootstrap.changes: same change cross-avr-gcc7.changes: same change cross-epiphany-gcc7-bootstrap.changes: same change cross-epiphany-gcc7.changes: same change cross-hppa-gcc7.changes: same change cross-i386-gcc7.changes: same change cross-m68k-gcc7.changes: same change cross-mips-gcc7.changes: same change cross-nvptx-gcc7.changes: same change cross-ppc64-gcc7.changes: same change cross-ppc64le-gcc7.changes: same change cross-rx-gcc7-bootstrap.changes: same change cross-rx-gcc7.changes: same change cross-s390x-gcc7.changes: same change cross-sparc-gcc7.changes: same change cross-sparc64-gcc7.changes: same change cross-x86_64-gcc7.changes: same change gcc7-testresults.changes: same change gcc7.changes: same change New: ---- gcc7-bsc1160086.patch ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ cross-aarch64-gcc7.spec ++++++ --- /var/tmp/diff_new_pack.S0w62e/_old 2020-03-20 05:52:20.012040587 +0100 +++ /var/tmp/diff_new_pack.S0w62e/_new 2020-03-20 05:52:20.012040587 +0100 @@ -1,7 +1,7 @@ # # spec file for package cross-aarch64-gcc7 # -# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany. +# Copyright (c) 2020 SUSE LINUX GmbH, Nuernberg, Germany. # # All modifications and additions to the file contributed by third parties # remain the property of their copyright owners, unless otherwise agreed @@ -126,6 +126,7 @@ Patch17: gcc7-flive-patching.patch Patch18: gcc7-bsc1146475.patch Patch19: gcc7-pr85887.patch +Patch20: gcc7-bsc1160086.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -273,6 +274,7 @@ %patch17 -p1 %patch18 %patch19 +%patch20 %patch51 %patch60 %patch61 cross-arm-gcc7.spec: same change cross-arm-none-gcc7-bootstrap.spec: same change cross-arm-none-gcc7.spec: same change cross-avr-gcc7-bootstrap.spec: same change cross-avr-gcc7.spec: same change cross-epiphany-gcc7-bootstrap.spec: same change cross-epiphany-gcc7.spec: same change cross-hppa-gcc7.spec: same change cross-i386-gcc7.spec: same change cross-m68k-gcc7.spec: same change cross-mips-gcc7.spec: same change cross-nvptx-gcc7.spec: same change cross-ppc64-gcc7.spec: same change cross-ppc64le-gcc7.spec: same change cross-rx-gcc7-bootstrap.spec: same change cross-rx-gcc7.spec: same change cross-s390x-gcc7.spec: same change cross-sparc-gcc7.spec: same change cross-sparc64-gcc7.spec: same change cross-x86_64-gcc7.spec: same change gcc7-testresults.spec: same change ++++++ gcc7.spec ++++++ --- /var/tmp/diff_new_pack.S0w62e/_old 2020-03-20 05:52:20.340040806 +0100 +++ /var/tmp/diff_new_pack.S0w62e/_new 2020-03-20 05:52:20.344040809 +0100 @@ -1,7 +1,7 @@ # # spec file for package gcc7 # -# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany. +# Copyright (c) 2020 SUSE LINUX GmbH, Nuernberg, Germany. # # All modifications and additions to the file contributed by third parties # remain the property of their copyright owners, unless otherwise agreed @@ -301,6 +301,7 @@ Patch17: gcc7-flive-patching.patch Patch18: gcc7-bsc1146475.patch Patch19: gcc7-pr85887.patch +Patch20: gcc7-bsc1160086.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -1754,6 +1755,7 @@ %patch17 -p1 %patch18 %patch19 +%patch20 %patch51 %patch60 %patch61 ++++++ gcc.spec.in ++++++ --- /var/tmp/diff_new_pack.S0w62e/_old 2020-03-20 05:52:20.468040891 +0100 +++ /var/tmp/diff_new_pack.S0w62e/_new 2020-03-20 05:52:20.468040891 +0100 @@ -307,6 +307,7 @@ Patch17: gcc7-flive-patching.patch Patch18: gcc7-bsc1146475.patch Patch19: gcc7-pr85887.patch +Patch20: gcc7-bsc1160086.patch # A set of patches from the RH srpm Patch51: gcc41-ppc32-retaddr.patch # Some patches taken from Debian @@ -1064,6 +1065,7 @@ %patch17 -p1 %patch18 %patch19 +%patch20 %patch51 %patch60 %patch61 ++++++ gcc7-bsc1160086.patch ++++++ 2019-12-17 Andreas Krebbel <[email protected]> Backport from mainline 2019-12-16 Andreas Krebbel <[email protected]> PR target/92950 * config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy, and lhrl with llc. * gcc.target/s390/vector/pr92950.c: New test. Index: gcc/testsuite/gcc.target/s390/vector/pr92950.c =================================================================== --- gcc/testsuite/gcc.target/s390/vector/pr92950.c (nonexistent) +++ gcc/testsuite/gcc.target/s390/vector/pr92950.c (revision 279454) @@ -0,0 +1,24 @@ +/* { dg-do run } */ +/* { dg-options "-O3 -mzarch -march=z13" } */ + +struct a { + int b; + char c; +}; +struct a d = {1, 16}; +struct a *e = &d; + +int f = 0; + +int main() { + struct a g = {0, 0 }; + f = 0; + + for (; f <= 1; f++) { + g = d; + *e = g; + } + + if (d.c != 16) + __builtin_abort(); +} Index: gcc/config/s390/vector.md =================================================================== --- gcc/config/s390/vector.md (revision 279453) +++ gcc/config/s390/vector.md (revision 279454) @@ -289,9 +289,9 @@ (define_split ; However, this would probably be slower. (define_insn "mov<mode>" - [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,d,d,R,T") - (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,R,T,b,d,d"))] - "" + [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, S, Q, S, d, d,d,R,T") + (match_operand:V_8 1 "general_operand" " v,d,v,R,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,T,d,d"))] + "TARGET_VX" "@ vlr\t%v0,%v1 vlvgb\t%v0,%1,0 @@ -309,12 +309,10 @@ (define_insn "mov<mode>" mviy\t%0,-1 lhi\t%0,0 lhi\t%0,-1 - lh\t%0,%1 - lhy\t%0,%1 - lhrl\t%0,%1 + llc\t%0,%1 stc\t%1,%0 stcy\t%1,%0" - [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RX,RXY,RIL,RX,RXY")]) + [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RXY,RX,RXY")]) (define_insn "mov<mode>" [(set (match_operand:V_16 0 "nonimmediate_operand" "=v,v,d,v,R, v, v, v, v,d, Q, Q, d, d,d,d,d,R,T,b")
